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Commits on Dec 19, 2016

• [XRay] Fix assertion failure on empty machine basic blocks (PR 31424)

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• [X86] When recognizing vector loads or VZEXT_LOAD in selectScalarSSELoad make sure we pass the load's user rather than load itself to the second operand of IsLegalToFold.

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• [TableGen] Use 'unsigned' instead of 'bool' in a place where the code conditionally assigns numeric values. They happen to be 0 and 1 so this is NFC.

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• Add files I seem to have dropped in my revert (r290086).

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• Revert @llvm.assume with operator bundles (r289755-r289757)

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• [X86] Remove all of the patterns that use X86ISD:FAND/FXOR/FOR/FANDN except for the ones needed for SSE1. Anything SSE2 or above uses the integer ISD opcode.

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Commits on Dec 18, 2016

• [FileCheck] Fix --strict-whitespace --match-full-lines -- add test-case

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  Tom de Vries

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• [FileCheck] Fix --strict-whitespace --match-full-lines

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  Tom de Vries

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• [PDB] Don't use the long type

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  majnemer

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• [InstCombine] use commutative matchers for patterns with commutative operators

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  rotateright

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• Revert r289955 and r289962. This is causing lots of ASAN failures for us.

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• [X86] [AVX512] Minor fix in encoding of scalar EVEX instructions. NFC.

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  michaelz-eng

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• [X86][SSE] Add support for combining target shuffles to SHUFPS.

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  RKSimon

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• [FileCheck] Fix comment in ReadCheckFile

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  Tom de Vries

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• [X86][SSE][AVX-512] Convert FAND/FOR/FXOR/FANDN nodes to integer operations if they are available. This will allow a bunch of patterns to be removed.

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• [AVX-512] Use EVEX encoded XOR instruction for zeroing scalar registers when DQI and VLX instructions are available.

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• [AVX-512] Make sure VLX is also enabled before using EVEX encoded logic ops for scalars. I missed this in r290049.

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  topperc

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• [PDB] Don't reimplement CRC32

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  majnemer

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• [PDB] Validate superblock addresses

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Commits on Dec 17, 2016

• AMDGPU: Fix broken check prefix in test

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  arsenm

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• [AVX-512] Use EVEX encoded logic operations for scalar types when they are available. This gives the register allocator more registers to work with.

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• [AVX-512] Update scalar logic test to show missed opportunity to use EVEX encoded logic instructions to get more registers to use.

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• Revert "AArch64CollectLOH: Rewrite as block-local analysis."

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• [InstCombine] Simplify code slightly. NFC

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• Revert "[libFuzzer] add an experimental flag -experimental_len_control=1 that sets max_len to 1M and tries to increases the actual max sizes of mutations very gradually. Also remove a bit of dead c…

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• [DWARF] - Make PubIndexEntryDescriptor::toBits() to be const.

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  George Rimar

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• [DWARF] - Introduce DWARFDebugPubTable class for dumping pub* sections.

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  George Rimar

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• [libFuzzer] use less memory for merge

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• Add custom type for PseudoSourceValue

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  tstellarAMD

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• ADT: Add a getArrayRef() accessor to MapVector.

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• [libFuzzer] speed up __sanitizer_cov_trace_switch a bit more (remove DIV)

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• [libFuzzer] remove stale test

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• Move test to correct directory

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• [libFuzzer] when tracing switch statements, handle only one case at a time (to make things faster). Also ensure that the signals from value profile do not intersect with the regular coverage

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• Revert "[GVNHoist] Move GVNHoist to function simplification part of pipeline."

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