Skip to content
View sinferwu's full-sized avatar
1 follower · 8 following

Achievements

Achievement: Pull Shark

Achievements

Achievement: Pull Shark

Block or report sinferwu

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Stars

1 star written in Verilog
Clear filter

risclite / ARM9-compatible-soft-CPU-core

This ARMv4-compatible CPU core is written in synthesiable verilog.It could launch uCLinux and Linux in MODELSIM. It has high Dhrystone benchmark value: 1.2 DMIPS/MHz. It could be utilized in your F…

Verilog 76 32 Updated Oct 14, 2020