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agc.lst
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Block I Apollo Guidance Computer (AGC4) assembler version 1.6 for EPROM
First pass: generate symbol table.
Second pass: generate object code.
;==========================================================================
; AGC (file:agc.asm)
;
; Version: 1.0
; Author: John Pultorak
; Date: 6/7/2002
;
; PURPOSE:
; AGC Block I demonstration. Includes most of the AGC operating system:
; WAITLIST, EXEC, PINBALL (DSKY routines), NOUN tables, VERB tables,
; bank intercommunication routines, the KEY, T3, and T4 interrupt handlers,
; and some dual precision (DP) math routines.
;
; The interpreter is not currently implemented.
;
; Where available, the source is from the Apollo 8 command module computer (CMC)
; load (called COLOSSUS). In cases where COLOSSUS source is not available,
; functionally equivalent code was constructed using COLOSSUS calling and return
; parameters and according to specifications in the technical reports given below.
;
; OPERATION:
; TBD.
;
; ERRATA:
; - Adapted for the AGC4R assembler. The assembler directives and syntax
; differ somewhat from the original AGC assembler.
; - some of the original source was missing from the COLOSSUS listing and
; had to be reverse engineered. Those portions probably differ somewhat
; from the original code in implementation, but should be functionally
; identical.
; - because the COLOSSUS source is for a block II AGC, but the AGC
; implemented here is block I, about 5% of COLOSSUS had to be translated
; to equivalent block I code.
;
; SOURCES:
; Information on the Block I architecture: instruction set, instruction
; sequences, registers, register transfers, control pulses, memory and
; memory addressing, I/O assignments, interrupts, and involuntary counters
; was obtained from:
;
; A. Hopkins, R. Alonso, and H. Blair-Smith, "Logical Description
; for the Apollo Guidance Computer (AGC4)", R-393,
; MIT Instrumentation Laboratory, Cambridge, MA, Mar. 1963.
;
; Supplementary AGC hardware information was obtained from:
;
; R. Alonso, J. H. Laning, Jr. and H. Blair-Smith, "Preliminary
; MOD 3C Programmer's Manual", E-1077, MIT Instrumentation
; Laboratory, Cambridge, MA, Nov. 1961.
;
; B. I. Savage and A. Drake, "AGC4 Basic Training Manual, Volume I",
; E-2052, MIT Instrumentation Laboratory, Cambridge,
; MA, Jan. 1967.
;
; E. C. Hall, "MIT's Role in Project Apollo, Volume III, Computer
; Subsystem", R-700, MIT Charles Stark Draper Laboratory,
; Cambridge, MA, Aug. 1972.
;
; A. Hopkins, "Guidance Computer Design, Part VI", source unknown.
;
; E, C. Hall, "Journey to the Moon: The History of the Apollo
; Guidance Computer", AIAA, Reston VA, 1996.
;
; AGC software information was obtained from:
;
; AGC Block II COLOSSUS rev 249 assembly listing, Oct 28, 1968. (A
; listing of the 1st 50% of the build. It encludes the entire
; eraseable memory, restart initialization, T4RUPT, and the
; entire set of DSKY routines. About 5% of instructions
; had to be converted from Block II to Block I).
;
; A. I. Green and J. J. Rocchio, "Keyboard and Display System Program
; for AGC (Program Sunrise)", E-1574, MIT Instrumentation
; Laboratory, Cambridge, MA, Aug. 1964. Contains detailed
; flowcharts and design materials for the DSKY software.
;
; A. Hopkins, R. Alonso, and H. Blair-Smith, "Logical Description
; for the Apollo Guidance Computer (AGC4)", R-393,
; MIT Instrumentation Laboratory, Cambridge, MA, Mar. 1963.
; Contains the software interfaces for EXEC and WAITLIST, and
; portions of the dual precision (DP) math library.
;
;==========================================================================
INCL doc.asm
;==========================================================================
; AGC documentation (file:doc.asm)
;
; Version: 1.0
; Author: John Pultorak
; Date: 06/01/2002
;
; PURPOSE:
; Documents AGC ops source code.
;==========================================================================
;--------------------------------------------------------------------------
; DSKY OPERATION
;
; verb/noun (V/N) flash: When the verb and noun indicators flash
; at 1Hz, the DSKY is waiting for keyboard input.
;
;
; Display elapsed time from the AGC clock:
; <VERB> <0> <6> <NOUN> <3> <6> <ENTER>
;
; Test display lights
; a) <VERB> <3> <5> <ENTER>
; b) all DSKY lamps and display segments illuminate for 5 sec.
; c) after 5 sec, the DSKY lamps extinguish
;
; Load component 1 for dataset at octal address 50 with octal 123
; a) <VERB> <2> <1> <NOUN> <0> <1> <ENTER>
; b) verb/noun display flashes; waiting for address
; c) <5> <0> <ENTER>
; d) verb/noun display flash continues; waiting for data
; e) <1> <2> <3> <ENTER>
; f) octal word from R1 is loaded at address 50,
;
; Display component 1 of dataset at octal address 50:
; a) <VERB> <0> <1> <NOUN> <0> <1> <ENTER>
; b) verb/noun display flashes; waiting for address
; c) <5> <0> <ENTER>
; d) octal word from address 50 is displayed in R1
;
; Load 3 component dataset at octal address 50 with octal values
; 123,456,701
; a) <VERB> <2> <5> <NOUN> <0> <1> <ENTER>
; b) verb/noun display flashes; waiting for address
; c) <5> <0> <ENTER>
; d) verb/noun display flash continues; waiting for data
; e) <1> <2> <3> <ENTER>
; f) <4> <5> <6> <ENTER>
; g) <7> <0> <1> <ENTER>
; h) octal word from R1 is loaded at address 50,
; octal word from R2 is loaded at address 51,
; octal word from R3 is loaded at address 52
;
; Display 3 component dataset beginning at address 50:
; a) <VERB> <0> <5> <NOUN> <0> <1> <ENTER>
; b) verb/noun display flashes; waiting for address
; c) <5> <0> <ENTER>
; d) octal word from address 50 is displayed in R1,
; octal word from address 51 is displayed in R2,
; octal word from address 52 is displayed in R3
;
;--------------------------------------------------------------------------
;--------------------------------------------------------------------------
; COLOSSUS REGULAR VERBS (00-39 decimal)
;
; This is adapted from the Apollo 204 accident report posted on multiple
; web sites by Richard F. Drushel. The information has been changed as
; necessary to be consistent with usage in COLOSSUS.
;
;
; Verb | |
; Code | Description | Remarks
; | |
; 01 | Display octal comp 1 in R1 | Performs octal display of data on
; | | REGISTER 1.
; | |
; 02 | Display octal comp 2 in R2 | Performs octal display of data on
; | | REGISTER 1.
; | |
; 03 | Display octal comp 3 in R3 | Performs octal display of data on
; | | REGISTER 1.
; | |
; 04 | Display octal comp 1,2 | Performs octal display of data on
; | in R1,R2 | REGISTER 1 and REGISTER 2
; | |
; 05 | Display octal comp 1,2,3 | Performs octal display of data on
; | in R1,R2,R3 | REGISTER 1, REGISTER 2, and REGISTER 3.
; | |
; 06 | Display decimal in R1 or | Performs decimal display of data on
; | R1,R2 or R1,R2,R3 | appropriate registers. The scale
; | | factors, types of scale factor
; | | routines, and component information
; | | are stored within the machine for each
; | | noun which it is required to display
; | | in decimal.
; | |
; 07 | Display DP decimal in R1,R2 | Performs a double precision decimal
; | | display of data on REGISTER 1 and
; | | REGISTER 2. It does no scale
; | | factoring. It merely performs a 10-
; | | character, fractional decimal
; | | conversion of two consecutive, erasable
; | | registers, using REGISTER 1 and
; | | REGISTER 2. The sign is placed in the
; | | REGISTER 1 sign position with the
; | | REGISTER 2 sign position remaining
; | | blank. It cannot be used with mixed
; | | nouns. Its intended use is primarily
; | | with "machine address to be specified"
; | | nouns.
; | |
; 08 | (Spare) |
; | |
; 09 | (Spare) |
; | |
; 10 | (Spare) |
; | |
; 11 | Monitor octal comp 1 in R1 | Performs octal display of updated data
; | | every 1/2 second on REGISTER 1.
; | |
; 12 | Monitor octal comp 2 in R2 | Performs octal display of updated data
; | | every 1/2 second on REGISTER 1.
; | |
; 13 | Monitor octal comp 3 in R3 | Performs octal display of updated data
; | | every 1/2 second on REGISTER 1.
; | |
; 14 | Monitor octal comp 1,2 | Performs octal display of updated data
; | in R1,R2 | every 1/2 second on REGISTER 1 and
; | | REGISTER 2.
; | |
; 15 | Monitor octal comp 1,2,3 | Performs octal display of updated data
; | in R1,R2,R3 | every 1/2 second on REGISTER 1,
; | | REGISTER 2, and REGISTER 3.
; | |
; 16 | Monitor decimal in R1 or | Performs decimal display of updated
; | R1,R2, or R1,R2,R3 | data every 1/2 second on appropriate
; | | registers.
; | |
; 17 | Monitor DP decimal in R1,R2 | Performs double precision display of
; | | decimal data on REGISTER 1 and
; | | REGISTER 2. No scale factoring is
; | | performed. Provides 10-character,
; | | fractional decimal conversion of two
; | | consecutive erasable registers. The
; | | sign is placed in the sign-bit
; | | position of REGISTER 1. REGISTER 2
; | | sign bit is blank.
; | |
; 18 | (Spare) |
; | |
; 19 | (Spare) |
; | |
; 20 | (Spare) |
; | |
; 21 | Load component 1 into R1 | Performs data loading. Octal
; | | quantities are unsigned. Decimal
; | | quantities are preceded by + or -
; | | sign. Data is displayed on REGISTER
; | | 1.
; | |
; 22 | Load component 2 into R2 | Performs data loading. Octal
; | | quantities are unsigned. Decimal
; | | quantities are preceded by + or -
; | | sign. Data is displayed on REGISTER
; | | 2.
; | |
; 23 | Load component 3 into R3 | Performs data loading. Octal
; | | quantities are unsigned. Decimal
; | | quantities are preceded by + or -
; | | sign. Data is displayed on REGISTER
; | | 3.
; | |
; 24 | Load component 1,2 into | Performs data loading. Octal
; | R1,R2 | quantities are unsigned. Decimal
; | | quantities are preceded by + or -
; | | sign. Data is displayed on REGISTER
; | | 1 and REGISTER 2.
; | |
; 25 | Load component 1,2,3 into | Performs data loading. Octal
; | R1,R2,R3 | quantities are unsigned. Decimal
; | | quantities are preceded by + or -
; | | sign. Data is displayed on REGISTER
; | | 1, REGISTER 2, and REGISTER 3.
; | |
; 26 | (Spare) |
; | |
; 27 | Display fixed memory | This verb is included to permit
; | | displaying the contents of fixed
; | | memory in any bank. Its intended use
; | | is for checking program ropes and the
; | | BANK positions of program ropes.
; | |
; 28 | (Spare) |
; | |
; 29 | (Spare) |
; | |
; 30 | Request EXECUTIVE | Enters request to executive routine
; | (Used only during ground | for any machine address with priority
; | checkout.) | involved. This verb assumes that the
; | | desired priority has been loaded into
; | | bits 10-14 of the prio/delay register
; | | (noun 26). This verb is used with the
; | | noun, "machine address to be
; | | specified". The complete address of
; | | the desired location is then keyed in.
; | | (Refer to "Machine address to be
; | | specified" in paragraph on Verb/Noun
; | | Formats.)
; | |
; 31 | Request WAITLIST | Enters request to "waitlist routine"
; | (Used only during ground | for any machine address with delay
; | checkout.) | involved. This verb assumes that the
; | | desired number of 10-millisecond units
; | | of delay has been loaded into the low
; | | order bits of the prio/delay register
; | | (noun 26). This verb is used with the
; | | "machine address to be specified" noun.
; | | The complete address of the desired
; | | location is then keyed in. (Refer to
; | | "Machine address to be specified" in
; | | paragraph on Verb/Noun Formats.)
; | |
; 32 | Recycle |
; | |
; 33 | Proceed (without data) | Informs routine requesting data that
; | | the operator chooses not to load
; | | fresh data, but wishes the routine to
; | | continue as best it can with old data.
; | | Final decision for what action should
; | | be taken is left to the requesting
; | | routine.
; | |
; 34 | Terminate | Informs routine requesting data to be
; | | loaded that the operator chooses not
; | | to load fresh data and wishes the
; | | routine to terminate. Final decision
; | | for what action should be taken is
; | | left to the requesting routine. If
; | | monitor is on, it is turned off.
; | |
; 35 | Test lights |
; | |
; 36 | Request fresh start | Initializes the program control
; | | software and the keyboard and display
; | | system program.
; | |
; 37 | Change program (major mode) | Change to new major mode. (Refer to
; | | "Change major mode" in paragraph on
; | | Verb/Noun Formats.)
; | |
;--------------------------------------------------------------------------
;--------------------------------------------------------------------------
; COLOSSUS EXTENDED VERBS (40-99 decimal)
;
; Not implemented. Use of these verbs triggers the 'check fail' indicator.
;--------------------------------------------------------------------------
;--------------------------------------------------------------------------
; COLOSSUS NORMAL NOUNS (00-39 decimal)
;
; This is adapted from the Apollo 204 accident report posted on multiple
; web sites by Richard F. Drushel. The information has been changed as
; necessary to be consistent with usage in COLOSSUS.
;
;
; Noun | |
; Code | Description | Scale/Units
; | |
; 01 | Specify machine address (frac) | .XXXXX FRAC
; | | .XXXXX FRAC
; | | .XXXXX FRAC
; | |
; 02 | Specify machine address (whole) | XXXXX INTEGER
; | | XXXXX INTEGER
; | | XXXXX INTEGER
; | |
; 03 | Specify machine address (degree) | XXX.XX DEG
; | | XXX.XX DEG
; | | XXX.XX DEG
; | |
; 04 | (Spare) |
; | |
; 05 | (Spare) |
; | |
; 06 | (Spare) |
; | |
; 07 | (Spare) |
; | |
; 08 | (Spare) |
; | |
; 09 | Alarm codes | OCT
; | | OCT
; | | OCT
; | |
; 10 | (Spare) |
; | |
; 11 | (Spare) |
; | |
; 12 | (Spare) |
; | |
; 13 | (Spare) |
; | |
; 14 | (Spare) |
; | |
; 15 | Increment address | OCT
; | |
; | |
; 16 | (Spare) |
; | |
; 17 | (Spare) |
; | |
; 18 | (Spare) |
; | |
; 19 | (Spare) |
; | |
; 20 | (Spare) |
; | |
; 21 | (Spare) |
; | |
; 22 | (Spare) |
; | |
; 23 | (Spare) |
; | |
; 24 | (Spare) |
; | |
; 25 | (Spare) |
; | |
; 26 | Prio/delay, address | OCT (prio/delay)
; | | OCT (14-bit CADR)
; | | (not used)
; | |
; 27 | (Spare) |
; | |
; 28 | (Spare) |
; | |
; 29 | (Spare) |
; | |
; 30 | (Spare) |
; | |
; 31 | (Spare) |
; | |
; 32 | (Spare) |
; | |
; 33 | (Spare) |
; | |
; 34 | (Spare) |
; | |
; 35 | (Spare) |
; | |
; 36 | Time of CMC clock: |
; | REGISTER 1 | 00XXX. hours
; | REGISTER 2 | 000XX. minutes
; | REGISTER 3 | 0XX.XX seconds
; | |
; 37 | (Spare) |
; | |
; 38 | (Spare) |
; | |
; 39 | (Spare) |
; | |
;--------------------------------------------------------------------------
;--------------------------------------------------------------------------
; COLOSSUS MIXED NOUNS (40-99 decimal)
;
; Not implemented.
;--------------------------------------------------------------------------
;--------------------------------------------------------------------------
; AGC ADDRESS ASSIGNMENTS
;
; Central Registers
;
; 000000 A accumulator
; 000001 Q subroutine return address
; 000002 Z program counter
; 000003 LP lower product register
;
; Input Registers
;
; 000004 IN0
; 000005 IN1
; 000006 IN2
; 000007 IN3
;
; Output Registers
;
; 000010 OUT0
; 000011 OUT1
; 000012 OUT2
; 000013 OUT3
; 000014 OUT4
;
; Memory Bank Select
;
; 000015 BANK
;
; Interrupt Control
;
; 000016 RELINT re-enable interrupts
; 000017 INHINT inhibit interrupts
;
; Editing Registers
;
; 000020 CYR cycle right
; 000021 SR shift rRight
; 000022 CYL cycle left
; 000023 SL shift left
;
; Interrupt Storage Area
;
; 000024 ZRUPT save program counter (Z)
; 000025 BRUPT save B register
; 000026 ARUPT save accumulator (A)
; 000027 QRUPT save Q register
;
; 000030 - 000033 NOT USED
;
; Involuntary Counters
;
; 000034 OVCTR arithmetic overflow counter
; 000035 TIME2 AGC clock (high)
; 000036 TIME1 AGC clock (low)
; 000037 TIME3 WAITLIST (T3) timer
; 000040 TIME4 DISPLAY (T4) timer
;
; Involuntary Counters -- currently unused
;
; 000041 - 000056 NOT USED
;
; Eraseable Memory
;
; 000057 - 001777
;
; Start of fixed memory
;
; 002000 GOPROG AGC (re)start vector
;
; 002004 T3RUPT interrupt vector for TIME3 (T3RUPT)
; 020010 ERRUPT interrupt vector
; 020014 DSRUPT interrupt vector for DSRUPT (T4RUPT)
; 020020 KEYRUPT interrupt vector for keyboard
; 020024 UPRUPT interrupt vector for uplink
;--------------------------------------------------------------------------
;--------------------------------------------------------------------------
; AGC TABLES (name, file, description)
;
; Keyboard/display
; CHARIN2 bank40_1.asm keyboard character table
; INRELTAB bank40_1.asm DSKY register/display table map
; DSPTAB dsky_e.asm display table for DSKY
;
; Verbs:
; VERBTAB bank41_1.asm regular verb routines (00-39)
;
; Nouns:
; NNADTAB bank42_3.asm noun address table (00-99)
; NNTYPTAB bank42_3.asm noun type table (00-99)
; SFINTAB bank42_3.asm noun input scale factor select
; SFOUTAB bank42_3.asm nout output scale factor select
; IDADDTAB bank42_3.asm mixed noun address table (40-99)
; RUTMXTAB bank42_3.asm mixed noun scale factor routine (40-99)
;
; Noun scale factor routines:
; SFOUTABR bank41_1.asm scale factor output routines
; SFINTABR bank41_2.asm scale factor input routines
;
; Major Modes:
; FCADRMM bank04_1.asm entry points for MM jobs
; EPREMM1 bank04_1,asm priorities for MM jobs
;--------------------------------------------------------------------------
; ERASEABLE MEMORY DECLARATIONS
ORG BANK0 ; immediately following counters
INCL waitlist_e.asm ; WAITLIST variables
;==========================================================================
; WAITLIST (file:waitlist_e.asm)
;
; Version: 1.0
; Author: John Pultorak
; Date: 11/15/2001
;
; PURPOSE:
; Eraseable memory variables and structures for the WAITLIST. See the
; WAITLIST source code file for more information.
;==========================================================================
MAXTASK EQU 7 ; max number of tasks
MAXVAL EQU %037777 ; largest pos 15-bit int (+16383 dec)
MAXDELAY EQU 12000 ; 120 seconds (in .01 sec ticks)
MAXTIMEOUT EQU MAXVAL-MAXDELAY+1 ; TIME3 setting for MAXDELAY
; task delta t: number of 10 mSec ticks until timeout.
; i.e.: 0=timeout, 1=10mS until timeout, 2=20mS until timeout...
; maximum time delay is 120 (decimal) seconds.
;
; If a task record is empty (unused), the address is always set to
; zero and the time is set to MAXDELAY.
; task record structure
TSKTIME EQU 0 ; offset to task delta time
TSKADDR EQU 1 ; offset to 14-bit task address
TRECSZ EQU 2 ; size of task record (words)
; Array of all task records
WL_taskList EQU *
00057 0057 00000 1 DS 0 ; record 0
00060 0060 00000 1 DS 0
00061 0061 00000 1 DS 0 ; record 1
00062 0062 00000 1 DS 0
00063 0063 00000 1 DS 0 ; record 2
00064 0064 00000 1 DS 0
00065 0065 00000 1 DS 0 ; record 3
00066 0066 00000 1 DS 0
00067 0067 00000 1 DS 0 ; record 4
00070 0070 00000 1 DS 0
00071 0071 00000 1 DS 0 ; record 5
00072 0072 00000 1 DS 0
00073 0073 00000 1 DS 0 ; record 6
00074 0074 00000 1 DS 0
00075 0075 00000 1 WL_IN_saveQ DS 0 ; return address
00076 0076 00000 1 WL_IN_taskPtr DS 0 ; points to task rec in list
00077 0077 00000 1 WL_IN_loopCnt DS 0 ; loop counter
00100 0100 00000 1 WL_AT_saveQ DS 0 ; return address
00101 0101 00000 1 WL_AT_taskPtr DS 0 ; points to task rec in list
00102 0102 00000 1 WL_AT_newTime DS 0 ; time to be inserted
00103 0103 00000 1 WL_AT_timeLeft DS 0 ; time remaining until timeout
00104 0104 00000 1 WL_AT_loopCnt DS 0 ; loop counter
00105 0105 00000 1 WL_T3_saveQ DS 0 ; return address
00106 0106 00000 1 WL_T3_oldBank DS 0 ; current bank
00107 0107 00000 1 WL_ST_saveQ DS 0 ; return address
00110 0110 00000 1 WL_ST_taskPtr DS 0 ; points to task rec in list
00111 0111 00000 1 WL_ST_newTime DS 0 ; time-out time
00112 0112 00000 1 WL_ST_loopCnt DS 0 ; loop counter
00113 0113 00000 1 WL_RT_saveQ DS 0 ; return address
00114 0114 00000 1 WL_RT_runAddr DS 0 ; address of task to run
00115 0115 00000 1 WL_RM_saveQ DS 0 ; return address
00116 0116 00000 1 WL_RM_taskPtr DS 0 ; points to task rec in list
00117 0117 00000 1 WL_RM_taskPtr2 DS 0 ; points to task rec behind taskPtr
00120 0120 00000 1 WL_RM_loopCnt DS 0 ; loop counter
00121 0121 00000 1 WL_RM_retval DS 0 ; tmp store for return value
00122 0122 00000 1 WL_IS_newTime DS 0 ; INPUT: time to be inserted
00123 0123 00000 1 WL_IS_newAddr DS 0 ; INPUT: address to be inserted
00124 0124 00000 1 WL_IS_saveQ DS 0 ; return address
00125 0125 00000 1 WL_IS_taskPtr DS 0 ; points to task rec in list
00126 0126 00000 1 WL_IS_taskPtr2 DS 0 ; points to task rec ahead of taskPtr
00127 0127 00000 1 WL_IS_loopCnt DS 0 ; loop counter
INCL exec_e.asm ; EXEC variables
;==========================================================================
; EXEC (file:exec_e.asm)
;
; Version: 1.0
; Author: John Pultorak
; Date: 04/26/2002
;
; PURPOSE:
; Eraseable memory variables and structures for the EXEX. See the EXEC
; source code file for more information.
;
; The COLOSSUS version of this is on p. 70.
;
; ERRATA: The current version of the EXEC does not set the BANKSET parameter.
; Instead, it stores the 14-bit CADR in LOC. Also, the JOBPRIOBASE field
; has been added.
;==========================================================================
MAXJOBS EQU 7 ; max number jobs (not incl current job)
JRECSZ EQU 13 ; size of job record (words)
; (COLOSSUS, p. 70)
; dynamically allocated core sets for EXEC jobs (8 sets)
; record for current (running) job
; Job priority: 0=no job, 1=lowest priority job, 2=...
EX_currentJob EQU *
MPAC EQU * ; multi-purpose accumulator
00130 0130 00000 1 DS 0
00131 0131 00000 1 DS 0
00132 0132 00000 1 DS 0
00133 0133 00000 1 DS 0
00134 0134 00000 1 DS 0
00135 0135 00000 1 DS 0
00136 0136 00000 1 DS 0
00137 0137 00000 1 MODE DS 0 ; +1 for TP, +0 for DP, or -1 for vector
00140 0140 00000 1 LOC DS 0 ; location associated with job
00141 0141 00000 1 BANKSET DS 0 ; usually contains bank setting
00142 0142 00000 1 PUSHLOC DS 0 ; word of packed interpretive parameters
00143 0143 00000 1 PRIORITY DS 0 ; priority of present job and work area
00144 0144 00000 1 JOBPRIOBASE DS 0 ; nominal job priority
; records for additional jobs waiting to run
JREC0 EQU *
ORG JREC0+JRECSZ
JREC1 EQU *
ORG JREC1+JRECSZ
JREC2 EQU *
ORG JREC2+JRECSZ
JREC3 EQU *
ORG JREC3+JRECSZ
JREC4 EQU *
ORG JREC4+JRECSZ
JREC5 EQU *
ORG JREC5+JRECSZ
JREC6 EQU *
ORG JREC6+JRECSZ
; sorted list of jobs to run. The list is sorted by job priority
; with the highest priority job at the top of the list. Each
; entry on the list is a word index to a job record; the indexes are
; relative to 'EX_currentJob', but the current job is not on the
; list.
EX_jobList EQU *
ORG EX_jobList+MAXJOBS
LOCCTR EQU EX_jobList ; index to next job record
CHGJOB EQU 1 ; change jobs at next opportunity
KEEPJOB EQU 0 ; keep the same job
00307 0307 00000 1 newJob DS 0 ; change flag (set to CHGJOB or KEEPJOB)
00310 0310 00000 1 EX_JW_saveQ DS 0 ; return address
00311 0311 00000 1 EX_JW_loopCnt DS 0 ; loop counter
00312 0312 00000 1 EX_JW_CADR DS 0 ; address of job to wake
00313 0313 00000 1 EX_JW_foundit DS 0 ; 0=job not found, 1=found
00314 0314 00000 1 EX_JW_jobPtr DS 0 ; points to job rec in list
00315 0315 00000 1 EX_JW_jobPtr2 DS 0 ; points to job rec ahead of jobPtr
00316 0316 00000 1 EX_JW_fndIndx DS 0 ; index to awoken record
00317 0317 00000 1 EX_AJ_saveQ DS 0 ; return address
00320 0320 00000 1 EX_AJ_loopCnt DS 0 ; loop counter
00321 0321 00000 1 EX_AJ_jobPrio DS 0 ; priority of new job
00322 0322 00000 1 EX_AJ_jobPtr DS 0 ; initialized to EX_jobList at startup
00323 0323 00000 1 EX_AJ_field DS 0 ; index to field from start of record
00324 0324 00000 1 EX_AJ_findx DS 0 ; total index to field
00325 0325 00000 1 EX_IN_saveQ DS 0 ; return address
00326 0326 00000 1 EX_IN_loopCnt DS 0 ; loop counter
00327 0327 00000 1 EX_IN_jobPtr DS 0 ; points to job rec in list
00330 0330 00000 1 EX_IN_recIndex DS 0 ; record index init counter
00331 0331 00000 1 EX_IN_field DS 0 ; index to field from start of record
00332 0332 00000 1 EX_IN_findx DS 0 ; total index to field
00333 0333 00000 1 EX_MN_runAddr DS 0 ; address of job to run
00334 0334 00000 1 EX_MN_field DS 0 ; index to field from start of record
00335 0335 00000 1 EX_MN_findx DS 0 ; total index to field
00336 0336 00000 1 EX_RM_saveQ DS 0 ; return address
00337 0337 00000 1 EX_RM_jobPtr DS 0 ; points to job rec in list
00340 0340 00000 1 EX_RM_jobPtr2 DS 0 ; points to job rec behind jobPtr
00341 0341 00000 1 EX_RM_savePtr DS 0 ; tmp store for index taken off list
00342 0342 00000 1 EX_RM_loopCnt DS 0 ; loop counter
00343 0343 00000 1 EX_RM_retval DS 0 ; tmp store for return value
00344 0344 00000 1 EX_RM_field DS 0 ; index to field from start of record
00345 0345 00000 1 EX_RM_findx DS 0 ; total index to field
00346 0346 00000 1 EX_IS_newPrio DS 0 ; INPUT: priority to be inserted
00347 0347 00000 1 EX_IS_newPrioB DS 0 ; INPUT: nominal priority to be inserted
00350 0350 00000 1 EX_IS_newLoc DS 0 ; INPUT: address to be inserted
00351 0351 00000 1 EX_IS_saveQ DS 0 ; return address
00352 0352 00000 1 EX_IS_jobPtr DS 0 ; points to job rec in list
00353 0353 00000 1 EX_IS_jobPtr2 DS 0 ; points to job rec ahead of jobPtr
00354 0354 00000 1 EX_IS_loopCnt DS 0 ; loop counter
INCL dsky_e.asm ; DSKY variables
;==========================================================================
; DSKY (file:dsky_e.asm)
;
; Version: 1.0
; Author: John Pultorak
; Date: 12/14/2001
;
; PURPOSE:
; Eraseable memory variables and structures for the DSKY. See the EXEC
; source code file for more information.
;
; Adapted from the AGC Block II COLOSSUS rev 249 assembly listing,
; Oct 28, 1968.
;==========================================================================
00355 0355 00000 1 FLAGWRD5 DS 0
; GENERAL ERASABLE ASSIGNMENTS
; (COLOSSUS, p. 66)
; interrupt temporary storage pool
; (ITEMP1 through RUPTREG4)
00356 0356 00000 1 ITEMP1 DS 0
WAITEXIT EQU ITEMP1
EXECTEM1 EQU ITEMP1
00357 0357 00000 1 ITEMP2 DS 0
WAITBANK EQU ITEMP2
EXECTEM2 EQU ITEMP2
00360 0360 00000 1 ITEMP3 DS 0
RUPTSTOR EQU ITEMP3
WAITADR EQU ITEMP3
NEWPRIO EQU ITEMP3
00361 0361 00000 1 ITEMP4 DS 0
;LOCCTR EQU ITEMP4 ; moved to EXEC
WAITTEMP EQU ITEMP4
00362 0362 00000 1 ITEMP5 DS 0
NEWLOC EQU ITEMP5
00363 0363 00000 1 ITEMP6 DS 0
NEWLOCP1 EQU ITEMP6 ; DP address
00364 0364 00000 1 NEWJOB DS 0 ; COLOSSUS: must be at loc 68 due to wiring
00365 0365 00000 1 RUPTREG1 DS 0
00366 0366 00000 1 RUPTREG2 DS 0
00367 0367 00000 1 RUPTREG3 DS 0
00370 0370 00000 1 RUPTREG4 DS 0
KEYTEMP1 EQU RUPTREG4
DSRUPTEM EQU RUPTREG4
; FLAGWORD reservations
STATE EQU * ; 12 words
00371 0371 00000 1 DS 0
00372 0372 00000 1 DS 0
00373 0373 00000 1 DS 0
00374 0374 00000 1 DS 0
00375 0375 00000 1 DS 0
00376 0376 00000 1 DS 0
00377 0377 00000 1 DS 0
00400 0400 00000 1 DS 0
00401 0401 00000 1 DS 0
00402 0402 00000 1 DS 0
00403 0403 00000 1 DS 0
00404 0404 00000 1 DS 0
FLAGFILL EQU * ; space for future flags
00405 0405 00000 1 DS 0
00406 0406 00000 1 DS 0
00407 0407 00000 1 DS 0
00410 0410 00000 1 DS 0
; pad load for DAPs
; (COLOSSUS, p. 67)
EMDOT EQU FLAGFILL
; exit for VB3
STATEXIT EQU FLAGFILL+2
; EXEC temporaries which may be used between CCS NEWJOBS.
; (INTB15P through RUPTMXM)
00411 0411 00000 1 INTB15P DS 0 ; reflects 15th bit of indexable addresses
DSEXIT EQU INTB15P ; return for DSPIN
EXITEM EQU INTB15P ; return for scale factor routine select
BLANKRET EQU INTB15P ; return for 2BLANK
00412 0412 00000 1 INTBIT15 DS 0 ; similar to above
WRDRET EQU INTBIT15 ; return for 5BLANK
WDRET EQU INTBIT15 ; return for DSPWD
DECRET EQU INTBIT15 ; return for PUTCOM (dec load)
_2122REG EQU INTBIT15 ; temp for CHARIN
; The registers between ADDRWD and PRIORITY must stay in the following order
; for interpretive trace.
00413 0413 00000 1 ADDRWD DS 0 ; 12 bit interpretive operand subaddress
00414 0414 00000 1 POLISH DS 0 ; holds CADR made from POLISH address
UPDATRET EQU POLISH ; return for UPDATNN, UPDATVB
CHAR EQU POLISH ; temp for CHARIN
ERCNT EQU POLISH ; counter for error light reset
DECOUNT EQU POLISH ; counter for scaling and display (dec)
00415 0415 00000 1 FIXLOC DS 0 ; work area address
00416 0416 00000 1 OVFIND DS 0 ; set non-zero on overflow
VBUF EQU * ; temporary storage used for vectors
00417 0417 00000 1 DS 0
00420 0420 00000 1 DS 0
00421 0421 00000 1 DS 0
00422 0422 00000 1 DS 0
00423 0423 00000 1 DS 0
00424 0424 00000 1 DS 0
SGNON EQU VBUF ; temp for +,- on
NOUNTEM EQU VBUF ; counter for MIXNOUN fetch
DISTEM EQU VBUF ; counter for octal display verbs
DECTEM EQU VBUF ; counter for fetch (dec display verbs)
SGNOFF EQU VBUF+1 ; temp for +,- off
NVTEMP EQU VBUF+1 ; temp for NVSUB
SFTEMP1 EQU VBUF+1 ; storage for SF const hi part(=SFTEMP2-1)
HITEMIN EQU VBUF+1 ; temp for load of hrs, min, sec
; must = LOWTEMIN-1
CODE EQU VBUF+2 ; for DSPIN
SFTEMP2 EQU VBUF+2 ; storage for SF const low part(=SFTEMP1+1)
LOWTEMIN EQU VBUF+2 ; temp for load of hrs, min, sec
; must = HITEMIN+1
; (COLOSSUS, p. 68)
MIXTEMP EQU VBUF+3 ; for MIXNOUN data
SIGNRET EQU VBUF+3 ; return for +,- on
; Also, MIXTEMP+1 = VBUF+4, MIXTEMP+2 = VBUF+5
BUF EQU * ; temporary scalar storage
00425 0425 00000 1 DS 0
00426 0426 00000 1 DS 0
00427 0427 00000 1 DS 0
00430 0430 00000 1 BUF2 DS 0
00431 0431 00000 1 DS 0
INDEXLOC EQU BUF ; contains address of specified index
SWWORD EQU BUF ; address of switch word
SWBIT EQU BUF+1 ; switch bit within switch word
00432 0432 00000 1 MPTEMP DS 0 ; temporary used in multiply and shift
DMPNTEMP EQU MPTEMP ; DMPSUB temporary
00433 0433 00000 1 DOTINC DS 0 ; component increment for DOT subroutine
DVSIGN EQU DOTINC ; determines sign of DDV result
ESCAPE EQU DOTINC ; used in arcsin/arccos
ENTRET EQU DOTINC ; exit from enter
00434 0434 00000 1 DOTRET DS 0 ; return from DOT subroutine
DVNORMCT EQU DOTRET ; dividend normalization count in DDV
ESCAPE2 EQU DOTRET ; alternate arcsin/arccos switch
WDCNT EQU DOTRET ; char counter for DSPWD
INREL EQU DOTRET ; input buffer selector (X,Y,Z REG)
00435 0435 00000 1 MATINC DS 0 ; vector increment in MXV and VXM
MAXDVSW EQU MATINC ; +0 if DP quotient is near one - else -1
POLYCNT EQU MATINC ; polynomial loop counter
DSPMMTEM EQU MATINC ; DSPCOUNT save for DSPMM
MIXBR EQU MATINC ; indicator for mixed or normal noun
00436 0436 00000 1 TEM1 DS 0 ; EXEC temp
POLYRET EQU TEM1
DSREL EQU TEM1 ; rel address for DSPIN
00437 0437 00000 1 TEM2 DS 0 ; EXEC temp
DSMAG EQU TEM2 ; magnitude store for DSPIN
IDADDTEM EQU TEM2 ; mixnoun indirect address store
00440 0440 00000 1 TEM3 DS 0 ; EXEC temp
COUNT EQU TEM3 ; for DSPIN
00441 0441 00000 1 TEM4 DS 0 ; EXEC temp
LSTPTR EQU TEM4 ; list pointer for GRABUSY
RELRET EQU TEM4 ; return for RELDSP
FREERET EQU TEM4 ; return for FREEDSP
DSPWDRET EQU TEM4 ; return for DSPSIGN
SEPSCRET EQU TEM4 ; return for SEPSEC
SEPMNRET EQU TEM4 ; return for SEPMIN