NES in Verilog

BPSK demodulator ASIC design with Toshiba 45nm lib in verilog for EE 287 Spring 2013

Verilog library for ASIC and FPGA designers

🌊 Digital timing diagram rendering engine

PYNQ example of using the RFSoC as a QPSK transceiver.

V language server. (Old V language server - see v-analyzer)

A Verilog IEEE 1364-2005 language server written in Nim.

verilog_instance.vim: create instantiation of ports from port declaration