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Commits on Aug 1, 2013

• Debug Info Finder|Verifier: handle DbgLoc attached to instructions.

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  manman-ren

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• DebugInfo: Emit definitions for types with no members.

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  dwblaikie

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• change the inlinefnlocalvar testcase so it uses a triple that's not coff (doesn't seem to matter for the testcase itself, what it tests isn't triple specific), as coff has a slightly different way …

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  carlokok

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• Temporarily xfail a test that breaks on OS X when building with LTO.

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  bob-wilson

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• Update incorrect file headers.

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  chisophugis

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• Bugfix for making the DWARF debug strings and labels to code emitted as secrel32 instead of long opcodes (only for coff). This makes them debuggable with GDB.

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  carlokok

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• Only enable SLP-vectorization on O3 builds.

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• Pass -G argument to cmake with the same generator's name as used for the

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  atanasyan

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• remove executable permission from IntrinsicsXCore.td

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  Robert Lytton

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• R600: Add 64-bit float load/store support

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  tstellarAMD

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• R600: Use 64-bit alignment for 64-bit kernel arguments

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  tstellarAMD

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• R600/SI: Custom lower i64 ZERO_EXTEND

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  tstellarAMD

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• EVEX and compressed displacement encoding for AVX512

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  Elena Demikhovsky

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• [SystemZ] Reuse CC results for integer comparisons with zero

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  Richard Sandiford

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• [SystemZ] Prefer comparisons with zero

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  Richard Sandiford

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• Add tests for Mips DSP instructions.

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  Vladimir Medic

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  Vladimir Medic

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• Moving definition of MnemonicContainsDot field from class Instruction to class AsmParser as suggested.

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  Vladimir Medic

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  Vladimir Medic

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• AArch64: add initial NEON support

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  TNorthover

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• XCore target: add GCCBuiltin to four intrinsics

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  Robert Lytton

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• XCore target: Fix Vararg handling

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  Robert Lytton

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• XCore target: Add byval handling

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  Robert Lytton

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• Xcore target

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  Robert Lytton

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• Fix some misc. issues with Mips16 fp stubs.

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  Reed Kotler

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• Formatting.

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  echristo

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• Add an omitted IsCall=1.

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  Reed Kotler

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Commits on Jul 31, 2013

• Option parsing: remove non-SUPPORT_ALIASARGS fall-back

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  zmodem

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• Option parsing: add support for alias arguments.

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• 80-col

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  nadavrot

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• comment typo.

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  atrick

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• Added the B9.3.19 SUBS PC, LR, #imm (Thumb2) system instruction.

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  enderby

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• Revert "R600: Non vector only instruction can be scheduled on trans unit"

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  tstellarAMD

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• Revert "TableGen: Enumerate Schedule Model too."

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• Revert "R600: Use SchedModel enum for is{Trans,Vector}Only functions"

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• R600: Do not mergevector after a vector reg is used

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  Vincent Lejeune

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• R600: Avoid more than 4 literals in the same instruction group at scheduling

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  Vincent Lejeune

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