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Commits on Jul 12, 2020

• Documentation update

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Commits on May 5, 2020

• Update zmac assembler to version 5jan2019

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Commits on Dec 11, 2018

• Revert "Corrected unconnected enable line"

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Commits on Nov 28, 2018

• Some documentation updates

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Commits on Dec 5, 2017

• Correctly latch IO RW wait request

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• renamed signal wait_iorq to wait_iorqinta

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Commits on Dec 4, 2017

• Corrected unconnected enable line

  gdevic

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Commits on Aug 22, 2017

• minor copyright year change

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Commits on Aug 19, 2017

• Updating some readme files

  gdevic

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Commits on Jan 12, 2017

• Documentation update

  gdevic

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• Improved help text

  gdevic

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  78a55ba

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• Update Nexys3 clock cfg file

  gdevic

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• Fixed Xilinx basic_nexys3 build

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  gdevic

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Commits on Dec 10, 2016

• Simplify by adding nhold_clk_wait

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  gdevic

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• zxspectrum: Fix few Quartus warnings

  gdevic

  committed
  6e2e8a1

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• Add hold_clk_wait to ALU CFL latch

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• UART: fixed two synthesis warnings

  gdevic

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Commits on Dec 9, 2016

• Add hold_clk_wait to register control to delay T-flops

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  gdevic

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• Add hold_clk_wait to clrpc signal

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Commits on Dec 8, 2016

• Add wait state test to basic fpga host

  gdevic

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• Add wait state test to basic simulation host

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• Add host wait state circuitry from Zilog manual

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Commits on Dec 7, 2016

• Fixed nWAIT during M1 cycle

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• Tbl state flags to use discrete we and hold_clk_wait

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• genfuse add code to test nWAIT insertion at M1

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Commits on Dec 5, 2016

• genfuse realigned comments

  gdevic

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• genfuse align individual tests on an even clock

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• genfuse close output file

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Commits on Dec 4, 2016

• zxspectrum: Fix the shift key repeat bug

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  gdevic

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• Added new data pins module for Lattice toolset

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• Fixed M1 during reset

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• Added a short comment

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Commits on Nov 26, 2016

• Explicitly set python to execute within a batch file

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Commits on Mar 23, 2016

• zxspectrum: Adding the timing constraints file

  gdevic

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Commits on Mar 22, 2016

• zxspectrum: Corrected bits 7,5 when reading ULA port 254

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