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committedDec 31, 2021
pci: Let st*_pci_dma() take MemTxAttrs argument
Let devices specify transaction attributes when calling st*_pci_dma(). Keep the default MEMTXATTRS_UNSPECIFIED in the few callers. Reviewed-by: Richard Henderson <[email protected]> Signed-off-by: Philippe Mathieu-Daudé <[email protected]> Message-Id: <[email protected]>
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6 files changed

+52
-34
lines changed

6 files changed

+52
-34
lines changed
 

‎hw/audio/intel-hda.c

+6-4
Original file line numberDiff line numberDiff line change
@@ -345,6 +345,7 @@ static void intel_hda_corb_run(IntelHDAState *d)
345345

346346
static void intel_hda_response(HDACodecDevice *dev, bool solicited, uint32_t response)
347347
{
348+
const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
348349
HDACodecBus *bus = HDA_BUS(dev->qdev.parent_bus);
349350
IntelHDAState *d = container_of(bus, IntelHDAState, codecs);
350351
hwaddr addr;
@@ -367,8 +368,8 @@ static void intel_hda_response(HDACodecDevice *dev, bool solicited, uint32_t res
367368
ex = (solicited ? 0 : (1 << 4)) | dev->cad;
368369
wp = (d->rirb_wp + 1) & 0xff;
369370
addr = intel_hda_addr(d->rirb_lbase, d->rirb_ubase);
370-
stl_le_pci_dma(&d->pci, addr + 8*wp, response);
371-
stl_le_pci_dma(&d->pci, addr + 8*wp + 4, ex);
371+
stl_le_pci_dma(&d->pci, addr + 8 * wp, response, attrs);
372+
stl_le_pci_dma(&d->pci, addr + 8 * wp + 4, ex, attrs);
372373
d->rirb_wp = wp;
373374

374375
dprint(d, 2, "%s: [wp 0x%x] response 0x%x, extra 0x%x\n",
@@ -394,6 +395,7 @@ static void intel_hda_response(HDACodecDevice *dev, bool solicited, uint32_t res
394395
static bool intel_hda_xfer(HDACodecDevice *dev, uint32_t stnr, bool output,
395396
uint8_t *buf, uint32_t len)
396397
{
398+
const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
397399
HDACodecBus *bus = HDA_BUS(dev->qdev.parent_bus);
398400
IntelHDAState *d = container_of(bus, IntelHDAState, codecs);
399401
hwaddr addr;
@@ -428,7 +430,7 @@ static bool intel_hda_xfer(HDACodecDevice *dev, uint32_t stnr, bool output,
428430
st->be, st->bp, st->bpl[st->be].len, copy);
429431

430432
pci_dma_rw(&d->pci, st->bpl[st->be].addr + st->bp, buf, copy, !output,
431-
MEMTXATTRS_UNSPECIFIED);
433+
attrs);
432434
st->lpib += copy;
433435
st->bp += copy;
434436
buf += copy;
@@ -451,7 +453,7 @@ static bool intel_hda_xfer(HDACodecDevice *dev, uint32_t stnr, bool output,
451453
if (d->dp_lbase & 0x01) {
452454
s = st - d->st;
453455
addr = intel_hda_addr(d->dp_lbase & ~0x01, d->dp_ubase);
454-
stl_le_pci_dma(&d->pci, addr + 8*s, st->lpib);
456+
stl_le_pci_dma(&d->pci, addr + 8 * s, st->lpib, attrs);
455457
}
456458
dprint(d, 3, "dma: --\n");
457459

‎hw/net/eepro100.c

+18-11
Original file line numberDiff line numberDiff line change
@@ -700,23 +700,27 @@ static void set_ru_state(EEPRO100State * s, ru_state_t state)
700700

701701
static void dump_statistics(EEPRO100State * s)
702702
{
703+
const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
704+
703705
/* Dump statistical data. Most data is never changed by the emulation
704706
* and always 0, so we first just copy the whole block and then those
705707
* values which really matter.
706708
* Number of data should check configuration!!!
707709
*/
708710
pci_dma_write(&s->dev, s->statsaddr, &s->statistics, s->stats_size);
709711
stl_le_pci_dma(&s->dev, s->statsaddr + 0,
710-
s->statistics.tx_good_frames);
712+
s->statistics.tx_good_frames, attrs);
711713
stl_le_pci_dma(&s->dev, s->statsaddr + 36,
712-
s->statistics.rx_good_frames);
714+
s->statistics.rx_good_frames, attrs);
713715
stl_le_pci_dma(&s->dev, s->statsaddr + 48,
714-
s->statistics.rx_resource_errors);
716+
s->statistics.rx_resource_errors, attrs);
715717
stl_le_pci_dma(&s->dev, s->statsaddr + 60,
716-
s->statistics.rx_short_frame_errors);
718+
s->statistics.rx_short_frame_errors, attrs);
717719
#if 0
718-
stw_le_pci_dma(&s->dev, s->statsaddr + 76, s->statistics.xmt_tco_frames);
719-
stw_le_pci_dma(&s->dev, s->statsaddr + 78, s->statistics.rcv_tco_frames);
720+
stw_le_pci_dma(&s->dev, s->statsaddr + 76,
721+
s->statistics.xmt_tco_frames, attrs);
722+
stw_le_pci_dma(&s->dev, s->statsaddr + 78,
723+
s->statistics.rcv_tco_frames, attrs);
720724
missing("CU dump statistical counters");
721725
#endif
722726
}
@@ -833,6 +837,7 @@ static void set_multicast_list(EEPRO100State *s)
833837

834838
static void action_command(EEPRO100State *s)
835839
{
840+
const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
836841
/* The loop below won't stop if it gets special handcrafted data.
837842
Therefore we limit the number of iterations. */
838843
unsigned max_loop_count = 16;
@@ -911,7 +916,7 @@ static void action_command(EEPRO100State *s)
911916
}
912917
/* Write new status. */
913918
stw_le_pci_dma(&s->dev, s->cb_address,
914-
s->tx.status | ok_status | STATUS_C);
919+
s->tx.status | ok_status | STATUS_C, attrs);
915920
if (bit_i) {
916921
/* CU completed action. */
917922
eepro100_cx_interrupt(s);
@@ -937,6 +942,7 @@ static void action_command(EEPRO100State *s)
937942

938943
static void eepro100_cu_command(EEPRO100State * s, uint8_t val)
939944
{
945+
const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
940946
cu_state_t cu_state;
941947
switch (val) {
942948
case CU_NOP:
@@ -986,7 +992,7 @@ static void eepro100_cu_command(EEPRO100State * s, uint8_t val)
986992
/* Dump statistical counters. */
987993
TRACE(OTHER, logout("val=0x%02x (dump stats)\n", val));
988994
dump_statistics(s);
989-
stl_le_pci_dma(&s->dev, s->statsaddr + s->stats_size, 0xa005);
995+
stl_le_pci_dma(&s->dev, s->statsaddr + s->stats_size, 0xa005, attrs);
990996
break;
991997
case CU_CMD_BASE:
992998
/* Load CU base. */
@@ -997,7 +1003,7 @@ static void eepro100_cu_command(EEPRO100State * s, uint8_t val)
9971003
/* Dump and reset statistical counters. */
9981004
TRACE(OTHER, logout("val=0x%02x (dump stats and reset)\n", val));
9991005
dump_statistics(s);
1000-
stl_le_pci_dma(&s->dev, s->statsaddr + s->stats_size, 0xa007);
1006+
stl_le_pci_dma(&s->dev, s->statsaddr + s->stats_size, 0xa007, attrs);
10011007
memset(&s->statistics, 0, sizeof(s->statistics));
10021008
break;
10031009
case CU_SRESUME:
@@ -1612,6 +1618,7 @@ static ssize_t nic_receive(NetClientState *nc, const uint8_t * buf, size_t size)
16121618
* - Magic packets should set bit 30 in power management driver register.
16131619
* - Interesting packets should set bit 29 in power management driver register.
16141620
*/
1621+
const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
16151622
EEPRO100State *s = qemu_get_nic_opaque(nc);
16161623
uint16_t rfd_status = 0xa000;
16171624
#if defined(CONFIG_PAD_RECEIVED_FRAMES)
@@ -1726,9 +1733,9 @@ static ssize_t nic_receive(NetClientState *nc, const uint8_t * buf, size_t size)
17261733
TRACE(OTHER, logout("command 0x%04x, link 0x%08x, addr 0x%08x, size %u\n",
17271734
rfd_command, rx.link, rx.rx_buf_addr, rfd_size));
17281735
stw_le_pci_dma(&s->dev, s->ru_base + s->ru_offset +
1729-
offsetof(eepro100_rx_t, status), rfd_status);
1736+
offsetof(eepro100_rx_t, status), rfd_status, attrs);
17301737
stw_le_pci_dma(&s->dev, s->ru_base + s->ru_offset +
1731-
offsetof(eepro100_rx_t, count), size);
1738+
offsetof(eepro100_rx_t, count), size, attrs);
17321739
/* Early receive interrupt not supported. */
17331740
#if 0
17341741
eepro100_er_interrupt(s);

‎hw/net/tulip.c

+10-8
Original file line numberDiff line numberDiff line change
@@ -86,16 +86,18 @@ static void tulip_desc_read(TULIPState *s, hwaddr p,
8686
static void tulip_desc_write(TULIPState *s, hwaddr p,
8787
struct tulip_descriptor *desc)
8888
{
89+
const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
90+
8991
if (s->csr[0] & CSR0_DBO) {
90-
stl_be_pci_dma(&s->dev, p, desc->status);
91-
stl_be_pci_dma(&s->dev, p + 4, desc->control);
92-
stl_be_pci_dma(&s->dev, p + 8, desc->buf_addr1);
93-
stl_be_pci_dma(&s->dev, p + 12, desc->buf_addr2);
92+
stl_be_pci_dma(&s->dev, p, desc->status, attrs);
93+
stl_be_pci_dma(&s->dev, p + 4, desc->control, attrs);
94+
stl_be_pci_dma(&s->dev, p + 8, desc->buf_addr1, attrs);
95+
stl_be_pci_dma(&s->dev, p + 12, desc->buf_addr2, attrs);
9496
} else {
95-
stl_le_pci_dma(&s->dev, p, desc->status);
96-
stl_le_pci_dma(&s->dev, p + 4, desc->control);
97-
stl_le_pci_dma(&s->dev, p + 8, desc->buf_addr1);
98-
stl_le_pci_dma(&s->dev, p + 12, desc->buf_addr2);
97+
stl_le_pci_dma(&s->dev, p, desc->status, attrs);
98+
stl_le_pci_dma(&s->dev, p + 4, desc->control, attrs);
99+
stl_le_pci_dma(&s->dev, p + 8, desc->buf_addr1, attrs);
100+
stl_le_pci_dma(&s->dev, p + 12, desc->buf_addr2, attrs);
99101
}
100102
}
101103

‎hw/scsi/megasas.c

+10-5
Original file line numberDiff line numberDiff line change
@@ -168,14 +168,16 @@ static void megasas_frame_set_cmd_status(MegasasState *s,
168168
unsigned long frame, uint8_t v)
169169
{
170170
PCIDevice *pci = &s->parent_obj;
171-
stb_pci_dma(pci, frame + offsetof(struct mfi_frame_header, cmd_status), v);
171+
stb_pci_dma(pci, frame + offsetof(struct mfi_frame_header, cmd_status),
172+
v, MEMTXATTRS_UNSPECIFIED);
172173
}
173174

174175
static void megasas_frame_set_scsi_status(MegasasState *s,
175176
unsigned long frame, uint8_t v)
176177
{
177178
PCIDevice *pci = &s->parent_obj;
178-
stb_pci_dma(pci, frame + offsetof(struct mfi_frame_header, scsi_status), v);
179+
stb_pci_dma(pci, frame + offsetof(struct mfi_frame_header, scsi_status),
180+
v, MEMTXATTRS_UNSPECIFIED);
179181
}
180182

181183
static inline const char *mfi_frame_desc(unsigned int cmd)
@@ -542,6 +544,7 @@ static MegasasCmd *megasas_enqueue_frame(MegasasState *s,
542544

543545
static void megasas_complete_frame(MegasasState *s, uint64_t context)
544546
{
547+
const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
545548
PCIDevice *pci_dev = PCI_DEVICE(s);
546549
int tail, queue_offset;
547550

@@ -555,10 +558,12 @@ static void megasas_complete_frame(MegasasState *s, uint64_t context)
555558
*/
556559
if (megasas_use_queue64(s)) {
557560
queue_offset = s->reply_queue_head * sizeof(uint64_t);
558-
stq_le_pci_dma(pci_dev, s->reply_queue_pa + queue_offset, context);
561+
stq_le_pci_dma(pci_dev, s->reply_queue_pa + queue_offset,
562+
context, attrs);
559563
} else {
560564
queue_offset = s->reply_queue_head * sizeof(uint32_t);
561-
stl_le_pci_dma(pci_dev, s->reply_queue_pa + queue_offset, context);
565+
stl_le_pci_dma(pci_dev, s->reply_queue_pa + queue_offset,
566+
context, attrs);
562567
}
563568
s->reply_queue_tail = ldl_le_pci_dma(pci_dev, s->consumer_pa);
564569
trace_megasas_qf_complete(context, s->reply_queue_head,
@@ -572,7 +577,7 @@ static void megasas_complete_frame(MegasasState *s, uint64_t context)
572577
s->reply_queue_head = megasas_next_index(s, tail, s->fw_cmds);
573578
trace_megasas_qf_update(s->reply_queue_head, s->reply_queue_tail,
574579
s->busy);
575-
stl_le_pci_dma(pci_dev, s->producer_pa, s->reply_queue_head);
580+
stl_le_pci_dma(pci_dev, s->producer_pa, s->reply_queue_head, attrs);
576581
/* Notify HBA */
577582
if (msix_enabled(pci_dev)) {
578583
trace_megasas_msix_raise(0);

‎hw/scsi/vmw_pvscsi.c

+2-1
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,8 @@
5555
(m)->rs_pa + offsetof(struct PVSCSIRingsState, field)))
5656
#define RS_SET_FIELD(m, field, val) \
5757
(stl_le_pci_dma(&container_of(m, PVSCSIState, rings)->parent_obj, \
58-
(m)->rs_pa + offsetof(struct PVSCSIRingsState, field), val))
58+
(m)->rs_pa + offsetof(struct PVSCSIRingsState, field), val, \
59+
MEMTXATTRS_UNSPECIFIED))
5960

6061
struct PVSCSIClass {
6162
PCIDeviceClass parent_class;

‎include/hw/pci/pci.h

+6-5
Original file line numberDiff line numberDiff line change
@@ -859,11 +859,12 @@ static inline MemTxResult pci_dma_write(PCIDevice *dev, dma_addr_t addr,
859859
MEMTXATTRS_UNSPECIFIED); \
860860
return val; \
861861
} \
862-
static inline void st##_s##_pci_dma(PCIDevice *dev, \
863-
dma_addr_t addr, uint##_bits##_t val) \
864-
{ \
865-
st##_s##_dma(pci_get_address_space(dev), addr, val, \
866-
MEMTXATTRS_UNSPECIFIED); \
862+
static inline void st##_s##_pci_dma(PCIDevice *dev, \
863+
dma_addr_t addr, \
864+
uint##_bits##_t val, \
865+
MemTxAttrs attrs) \
866+
{ \
867+
st##_s##_dma(pci_get_address_space(dev), addr, val, attrs); \
867868
}
868869

869870
PCI_DMA_DEFINE_LDST(ub, b, 8);

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