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// are actually relatively cheap. It therefore doesn't seem worth spending
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// much compilation time on the problem. Instead, the approach we take is:
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//
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- // (1) Check whether all branches can be short (the usual case). Exit the
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- // pass if so.
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- // (2) If one branch needs to be long, work out the address that each block
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- // would have if all branches need to be long, as for shortening above.
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- // (3) Relax any branch that is out of range according to this pessimistic
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- // assumption.
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+ // (1) Work out the address that each block would have if no branches
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+ // need relaxing. Exit the pass early if all branches are in range
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+ // according to this assumption.
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+ //
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+ // (2) Work out the address that each block would have if all branches
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+ // need relaxing.
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+ //
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+ // (3) Walk through the block calculating the final address of each instruction
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+ // and relaxing those that need to be relaxed. For backward branches,
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+ // this check uses the final address of the target block, as calculated
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+ // earlier in the walk. For forward branches, this check uses the
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+ // address of the target block that was calculated in (2). Both checks
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+ // give a conservatively-correct range.
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//
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// ===----------------------------------------------------------------------===//
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@@ -68,10 +75,7 @@ namespace {
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// Represents positional information about a basic block.
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struct MBBInfo {
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- // The address that we currently assume the block has, relative to
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- // the start of the function. This is designed so that taking the
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- // difference between two addresses gives a conservative upper bound
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- // on the distance between them.
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+ // The address that we currently assume the block has.
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uint64_t Address;
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// The size of the block in bytes, excluding terminators.
@@ -95,8 +99,7 @@ namespace {
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// instruction, otherwise it is null.
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MachineInstr *Branch;
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- // The current address of the terminator, in the same form as
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- // for BlockInfo.
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+ // The address that we currently assume the terminator has.
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uint64_t Address;
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// The current size of the terminator in bytes.
@@ -115,8 +118,7 @@ namespace {
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// Used to keep track of the current position while iterating over the blocks.
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struct BlockPosition {
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- // The offset from the start of the function, in the same form
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- // as BlockInfo.
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+ // The address that we assume this position has.
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uint64_t Address;
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// The number of low bits in Address that are known to be the same
@@ -146,7 +148,7 @@ namespace {
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bool AssumeRelaxed);
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TerminatorInfo describeTerminator (MachineInstr *MI);
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uint64_t initMBBInfo ();
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- bool mustRelaxBranch (const TerminatorInfo &Terminator);
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+ bool mustRelaxBranch (const TerminatorInfo &Terminator, uint64_t Address );
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bool mustRelaxABranch ();
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void setWorstCaseAddresses ();
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void relaxBranch (TerminatorInfo &Terminator);
@@ -274,17 +276,19 @@ uint64_t SystemZLongBranch::initMBBInfo() {
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return Position.Address ;
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}
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- // Return true if, under current assumptions, Terminator needs to be relaxed.
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- bool SystemZLongBranch::mustRelaxBranch (const TerminatorInfo &Terminator) {
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+ // Return true if, under current assumptions, Terminator would need to be
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+ // relaxed if it were placed at address Address.
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+ bool SystemZLongBranch::mustRelaxBranch (const TerminatorInfo &Terminator,
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+ uint64_t Address) {
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if (!Terminator.Branch )
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return false ;
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const MBBInfo &Target = MBBs[Terminator.TargetBlock ];
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- if (Target. Address < Terminator .Address ) {
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- if (Terminator. Address - Target.Address <= MaxBackwardRange)
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+ if (Address >= Target .Address ) {
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+ if (Address - Target.Address <= MaxBackwardRange)
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return false ;
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} else {
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- if (Target.Address - Terminator. Address <= MaxForwardRange)
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+ if (Target.Address - Address <= MaxForwardRange)
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return false ;
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}
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@@ -296,7 +300,7 @@ bool SystemZLongBranch::mustRelaxBranch(const TerminatorInfo &Terminator) {
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bool SystemZLongBranch::mustRelaxABranch () {
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for (SmallVector<TerminatorInfo, 16 >::iterator TI = Terminators.begin (),
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TE = Terminators.end (); TI != TE; ++TI)
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- if (mustRelaxBranch (*TI))
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+ if (mustRelaxBranch (*TI, TI-> Address ))
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return true ;
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return false ;
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}
@@ -337,12 +341,22 @@ void SystemZLongBranch::relaxBranch(TerminatorInfo &Terminator) {
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++LongBranches;
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}
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- // Relax any branches that need to be relaxed, under current assumptions .
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+ // Run a shortening pass and relax any branches that need to be relaxed.
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void SystemZLongBranch::relaxBranches () {
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- for (SmallVector<TerminatorInfo, 16 >::iterator TI = Terminators.begin (),
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- TE = Terminators.end (); TI != TE; ++TI)
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- if (mustRelaxBranch (*TI))
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- relaxBranch (*TI);
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+ SmallVector<TerminatorInfo, 16 >::iterator TI = Terminators.begin ();
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+ BlockPosition Position (MF->getAlignment ());
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+ for (SmallVector<MBBInfo, 16 >::iterator BI = MBBs.begin (), BE = MBBs.end ();
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+ BI != BE; ++BI) {
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+ skipNonTerminators (Position, *BI);
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+ for (unsigned BTI = 0 , BTE = BI->NumTerminators ; BTI != BTE; ++BTI) {
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+ assert (Position.Address <= TI->Address &&
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+ " Addresses shouldn't go forwards" );
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+ if (mustRelaxBranch (*TI, Position.Address ))
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+ relaxBranch (*TI);
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+ skipTerminator (Position, *TI, false );
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+ ++TI;
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+ }
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+ }
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}
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bool SystemZLongBranch::runOnMachineFunction (MachineFunction &F) {
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