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mcpwm.c
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/*
Copyright 2012-2014 Benjamin Vedder [email protected]
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* mcpwm.c
*
* Created on: 13 okt 2012
* Author: benjamin
*/
#include "ch.h"
#include "hal.h"
#include "stm32f4xx_conf.h"
#include <stdlib.h>
#include <math.h>
#include <stdio.h>
#include <string.h>
#include "main.h"
#include "mcpwm.h"
#include "digital_filter.h"
#include "utils.h"
#include "ledpwm.h"
#include "comm.h"
#include "hw.h"
// Structs
typedef struct {
volatile unsigned int top;
volatile unsigned int duty;
volatile unsigned int val_sample;
volatile unsigned int curr1_sample;
volatile unsigned int curr2_sample;
} mc_timer_struct;
// Private variables
static volatile int comm_step; // Range [1 6]
static volatile int detect_step; // Range [0 5]
static volatile int direction;
static volatile float dutycycle_set;
static volatile float dutycycle_now;
static volatile float rpm_now;
static volatile float speed_pid_set_rpm;
static volatile float current_set;
static volatile int tachometer;
static volatile int tachometer_for_direction;
static volatile int curr0_sum;
static volatile int curr1_sum;
static volatile int curr_start_samples;
static volatile int curr0_offset;
static volatile int curr1_offset;
static volatile mc_state state;
static volatile mc_fault_code fault_now;
static volatile mc_control_mode control_mode;
static volatile float last_current_sample;
static volatile float last_current_sample_filtered;
static volatile float motor_current_sum;
static volatile float input_current_sum;
static volatile float motor_current_iterations;
static volatile float input_current_iterations;
static volatile float mcpwm_detect_currents_avg[6];
static volatile float mcpwm_detect_currents_avg_samples[6];
static volatile float switching_frequency_now;
static volatile int ignore_iterations;
static volatile mc_timer_struct timer_struct;
static volatile int curr_samp_volt; // Use the voltage-synchronized samples for this current sample
static int hall_to_phase_table[16];
static volatile unsigned int cycles_running;
static volatile unsigned int slow_ramping_cycles;
static volatile int has_commutated;
static volatile mc_rpm_dep_struct rpm_dep;
static volatile float cycle_integrator_sum;
static volatile float cycle_integrator_iterations;
static volatile mc_configuration conf;
static volatile float cycle_integrator;
static volatile float pwm_cycles_sum;
static volatile float last_pwm_cycles_sum;
static volatile float last_pwm_cycles_sums[6];
// KV FIR filter
#define KV_FIR_TAPS_BITS 7
#define KV_FIR_LEN (1 << KV_FIR_TAPS_BITS)
#define KV_FIR_FCUT 0.02
static volatile float kv_fir_coeffs[KV_FIR_LEN];
static volatile float kv_fir_samples[KV_FIR_LEN];
static volatile int kv_fir_index = 0;
// Amplitude FIR filter
#define AMP_FIR_TAPS_BITS 7
#define AMP_FIR_LEN (1 << AMP_FIR_TAPS_BITS)
#define AMP_FIR_FCUT 0.02
static volatile float amp_fir_coeffs[AMP_FIR_LEN];
static volatile float amp_fir_samples[AMP_FIR_LEN];
static volatile int amp_fir_index = 0;
// Current FIR filter
#define CURR_FIR_TAPS_BITS 4
#define CURR_FIR_LEN (1 << CURR_FIR_TAPS_BITS)
#define CURR_FIR_FCUT 0.15
static volatile float current_fir_coeffs[CURR_FIR_LEN];
static volatile float current_fir_samples[CURR_FIR_LEN];
static volatile int current_fir_index = 0;
static volatile float last_adc_isr_duration;
static volatile float last_inj_adc_isr_duration;
// Global variables
volatile uint16_t ADC_Value[HW_ADC_CHANNELS];
volatile int ADC_curr_norm_value[3];
volatile float mcpwm_detect_currents[6];
volatile float mcpwm_detect_currents_diff[6];
volatile int mcpwm_vzero;
// Private functions
static void set_duty_cycle_hl(float dutyCycle);
static void set_duty_cycle_ll(float dutyCycle);
static void set_duty_cycle_hw(float dutyCycle);
static void stop_pwm_ll(void);
static void stop_pwm_hw(void);
static void full_brake_ll(void);
static void full_brake_hw(void);
static void fault_stop(mc_fault_code fault);
static void run_pid_controller(void);
static void set_next_comm_step(int next_step);
static void update_rpm_tacho(void);
static void update_adc_sample_pos(mc_timer_struct *timer_tmp);
static void commutate(void);
static void set_next_timer_settings(mc_timer_struct *settings);
static void set_switching_frequency(float frequency);
static int try_input(void);
static void do_dc_cal(void);
// Defines
#define CYCLE_INT_START (0.0)
#define IS_DETECTING() (state == MC_STATE_DETECTING)
// Threads
static WORKING_AREA(timer_thread_wa, 1024);
static msg_t timer_thread(void *arg);
static WORKING_AREA(rpm_thread_wa, 1024);
static msg_t rpm_thread(void *arg);
void mcpwm_init(mc_configuration *configuration) {
utils_sys_lock_cnt();
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_OCInitTypeDef TIM_OCInitStructure;
TIM_BDTRInitTypeDef TIM_BDTRInitStructure;
NVIC_InitTypeDef NVIC_InitStructure;
conf = *configuration;
// Initialize variables
comm_step = 1;
detect_step = 0;
direction = 1;
rpm_now = 0;
dutycycle_set = 0.0;
dutycycle_now = 0.0;
speed_pid_set_rpm = 0.0;
current_set = 0.0;
tachometer = 0;
tachometer_for_direction = 0;
state = MC_STATE_OFF;
fault_now = FAULT_CODE_NONE;
control_mode = CONTROL_MODE_NONE;
last_current_sample = 0.0;
last_current_sample_filtered = 0.0;
motor_current_sum = 0.0;
input_current_sum = 0.0;
motor_current_iterations = 0.0;
input_current_iterations = 0.0;
switching_frequency_now = MCPWM_SWITCH_FREQUENCY_MAX;
ignore_iterations = 0;
curr_samp_volt = 0;
cycles_running = 0;
slow_ramping_cycles = 0;
has_commutated = 0;
memset((void*)&rpm_dep, 0, sizeof(rpm_dep));
cycle_integrator_sum = 0.0;
cycle_integrator_iterations = 0.0;
cycle_integrator = CYCLE_INT_START;
pwm_cycles_sum = 0.0;
last_pwm_cycles_sum = 0.0;
memset((float*)last_pwm_cycles_sums, 0, sizeof(last_pwm_cycles_sums));
mcpwm_init_hall_table(conf.hall_dir, conf.hall_fwd_add, conf.hall_rev_add);
// Create KV FIR filter
filter_create_fir_lowpass((float*)kv_fir_coeffs, KV_FIR_FCUT, KV_FIR_TAPS_BITS, 1);
// Create amplitude FIR filter
filter_create_fir_lowpass((float*)amp_fir_coeffs, AMP_FIR_FCUT, AMP_FIR_TAPS_BITS, 1);
// Create current FIR filter
filter_create_fir_lowpass((float*)current_fir_coeffs, CURR_FIR_FCUT, CURR_FIR_TAPS_BITS, 1);
TIM_DeInit(TIM1);
TIM_DeInit(TIM8);
TIM1->CNT = 0;
TIM8->CNT = 0;
// TIM1 clock enable
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);
// Time Base configuration
TIM_TimeBaseStructure.TIM_Prescaler = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseStructure.TIM_Period = SYSTEM_CORE_CLOCK / (int)switching_frequency_now;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);
// Channel 1, 2 and 3 Configuration in PWM mode
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_OutputNState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = TIM1->ARR / 2;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High;
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Set;
TIM_OC1Init(TIM1, &TIM_OCInitStructure);
TIM_OC2Init(TIM1, &TIM_OCInitStructure);
TIM_OC3Init(TIM1, &TIM_OCInitStructure);
TIM_OC4Init(TIM1, &TIM_OCInitStructure);
TIM_OC1PreloadConfig(TIM1, TIM_OCPreload_Enable);
TIM_OC2PreloadConfig(TIM1, TIM_OCPreload_Enable);
TIM_OC3PreloadConfig(TIM1, TIM_OCPreload_Enable);
TIM_OC4PreloadConfig(TIM1, TIM_OCPreload_Enable);
// Automatic Output enable, Break, dead time and lock configuration
TIM_BDTRInitStructure.TIM_OSSRState = TIM_OSSRState_Enable;
TIM_BDTRInitStructure.TIM_OSSIState = TIM_OSSRState_Enable;
TIM_BDTRInitStructure.TIM_LOCKLevel = TIM_LOCKLevel_OFF;
TIM_BDTRInitStructure.TIM_DeadTime = MCPWM_DEAD_TIME_CYCLES;
TIM_BDTRInitStructure.TIM_Break = TIM_Break_Disable;
TIM_BDTRInitStructure.TIM_BreakPolarity = TIM_BreakPolarity_High;
TIM_BDTRInitStructure.TIM_AutomaticOutput = TIM_AutomaticOutput_Disable;
TIM_BDTRConfig(TIM1, &TIM_BDTRInitStructure);
TIM_CCPreloadControl(TIM1, ENABLE);
TIM_ARRPreloadConfig(TIM1, ENABLE);
/*
* ADC!
*/
ADC_CommonInitTypeDef ADC_CommonInitStructure;
DMA_InitTypeDef DMA_InitStructure;
ADC_InitTypeDef ADC_InitStructure;
// Clock
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2 | RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOC, ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1 | RCC_APB2Periph_ADC2 | RCC_APB2Periph_ADC3, ENABLE);
dmaStreamAllocate(STM32_DMA_STREAM(STM32_DMA_STREAM_ID(2, 4)),
3,
(stm32_dmaisr_t)mcpwm_adc_int_handler,
(void *)0);
// DMA for the ADC
DMA_InitStructure.DMA_Channel = DMA_Channel_0;
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&ADC_Value;
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&ADC->CDR;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
DMA_InitStructure.DMA_BufferSize = HW_ADC_CHANNELS;
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull;
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
DMA_Init(DMA2_Stream4, &DMA_InitStructure);
// DMA2_Stream0 enable
DMA_Cmd(DMA2_Stream4, ENABLE);
// Enable transfer complete interrupt
DMA_ITConfig(DMA2_Stream4, DMA_IT_TC, ENABLE);
// ADC Common Init
// Note that the ADC is running at 42MHz, which is higher than the
// specified 36MHz in the data sheet, but it works.
ADC_CommonInitStructure.ADC_Mode = ADC_TripleMode_RegSimult;
ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2;
ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_1;
ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;
ADC_CommonInit(&ADC_CommonInitStructure);
// Channel-specific settings
ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
ADC_InitStructure.ADC_ScanConvMode = ENABLE;
ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_Falling;
ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T8_CC1;
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStructure.ADC_NbrOfConversion = HW_ADC_NBR_CONV;
ADC_Init(ADC1, &ADC_InitStructure);
ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;
ADC_InitStructure.ADC_ExternalTrigConv = 0;
ADC_Init(ADC2, &ADC_InitStructure);
ADC_Init(ADC3, &ADC_InitStructure);
hw_setup_adc_channels();
// Enable DMA request after last transfer (Multi-ADC mode)
ADC_MultiModeDMARequestAfterLastTransferCmd(ENABLE);
// Injected channels for current measurement at end of cycle
ADC_ExternalTrigInjectedConvConfig(ADC1, ADC_ExternalTrigInjecConv_T1_CC4);
ADC_ExternalTrigInjectedConvConfig(ADC2, ADC_ExternalTrigInjecConv_T8_CC2);
ADC_ExternalTrigInjectedConvEdgeConfig(ADC1, ADC_ExternalTrigInjecConvEdge_Falling);
ADC_ExternalTrigInjectedConvEdgeConfig(ADC2, ADC_ExternalTrigInjecConvEdge_Falling);
ADC_InjectedSequencerLengthConfig(ADC1, 1);
ADC_InjectedSequencerLengthConfig(ADC2, 1);
// Interrupt
ADC_ITConfig(ADC1, ADC_IT_JEOC, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = ADC_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 3;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
// Enable ADC1
ADC_Cmd(ADC1, ENABLE);
// Enable ADC2
ADC_Cmd(ADC2, ENABLE);
// Enable ADC3
ADC_Cmd(ADC3, ENABLE);
// ------------- Timer8 for ADC sampling ------------- //
// Time Base configuration
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM8, ENABLE);
TIM_TimeBaseStructure.TIM_Prescaler = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseStructure.TIM_Period = 0xFFFF;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
TIM_TimeBaseInit(TIM8, &TIM_TimeBaseStructure);
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStructure.TIM_Pulse = 500;
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High;
TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Set;
TIM_OC1Init(TIM8, &TIM_OCInitStructure);
TIM_OC1PreloadConfig(TIM8, TIM_OCPreload_Enable);
TIM_OC2Init(TIM8, &TIM_OCInitStructure);
TIM_OC2PreloadConfig(TIM8, TIM_OCPreload_Enable);
TIM_ARRPreloadConfig(TIM8, ENABLE);
TIM_CCPreloadControl(TIM8, ENABLE);
// PWM outputs have to be enabled in order to trigger ADC on CCx
TIM_CtrlPWMOutputs(TIM8, ENABLE);
// TIM1 Master and TIM8 slave
TIM_SelectOutputTrigger(TIM1, TIM_TRGOSource_Update);
TIM_SelectMasterSlaveMode(TIM1, TIM_MasterSlaveMode_Enable);
TIM_SelectInputTrigger(TIM8, TIM_TS_ITR0);
TIM_SelectSlaveMode(TIM8, TIM_SlaveMode_Reset);
// Enable TIM1 and TIM8
TIM_Cmd(TIM1, ENABLE);
TIM_Cmd(TIM8, ENABLE);
// Main Output Enable
TIM_CtrlPWMOutputs(TIM1, ENABLE);
// 32-bit timer for RPM measurement
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
uint16_t PrescalerValue = (uint16_t) ((SYSTEM_CORE_CLOCK / 2) / MCPWM_RPM_TIMER_FREQ) - 1;
// Time base configuration
TIM_TimeBaseStructure.TIM_Period = 0xFFFFFFFF;
TIM_TimeBaseStructure.TIM_Prescaler = PrescalerValue;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure);
// TIM2 enable counter
TIM_Cmd(TIM2, ENABLE);
// ADC sampling locations
stop_pwm_hw();
mc_timer_struct timer_tmp;
timer_tmp.top = TIM1->ARR;
timer_tmp.duty = TIM1->ARR / 2;
update_adc_sample_pos(&timer_tmp);
set_next_timer_settings(&timer_tmp);
utils_sys_unlock_cnt();
// Calibrate current offset
ENABLE_GATE();
DCCAL_OFF();
do_dc_cal();
// Various time measurements
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE);
PrescalerValue = (uint16_t) ((SYSTEM_CORE_CLOCK / 2) / 10000000) - 1;
// Time base configuration
TIM_TimeBaseStructure.TIM_Period = 0xFFFFFFFF;
TIM_TimeBaseStructure.TIM_Prescaler = PrescalerValue;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure);
// TIM3 enable counter
TIM_Cmd(TIM4, ENABLE);
// Start threads
chThdCreateStatic(timer_thread_wa, sizeof(timer_thread_wa), NORMALPRIO, timer_thread, NULL);
chThdCreateStatic(rpm_thread_wa, sizeof(rpm_thread_wa), NORMALPRIO, rpm_thread, NULL);
// WWDG configuration
RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE);
WWDG_SetPrescaler(WWDG_Prescaler_1);
WWDG_SetWindowValue(255);
WWDG_Enable(100);
}
mc_configuration mcpwm_get_configuration(void) {
return conf;
}
void mcpwm_set_configuration(mc_configuration *configuration) {
// Stop everything first to be safe
control_mode = CONTROL_MODE_NONE;
stop_pwm_ll();
utils_sys_lock_cnt();
conf = *configuration;
mcpwm_init_hall_table(conf.hall_dir, conf.hall_fwd_add, conf.hall_rev_add);
utils_sys_unlock_cnt();
}
/**
* Initialize the hall sensor lookup table
*
* @param dir
* Invert the direction
*
* @param fwd_add
* Offset to add when the motor is spinning forwards
*
* @param rev_add
* Offset to add when the motor is spinning reverse
*/
void mcpwm_init_hall_table(int dir, int fwd_add, int rev_add) {
const int comms1[8] = {-1,1,3,2,5,6,4,-1};
const int comms2[8] = {-1,1,5,6,3,2,4,-1};
memcpy(hall_to_phase_table, dir ? comms1 : comms2, sizeof(int[8]));
memcpy(hall_to_phase_table + 8, dir ? comms2 : comms1, sizeof(int[8]));
for (int i = 1;i < 7;i++) {
hall_to_phase_table[i ] = ((hall_to_phase_table[i ] + rev_add) % 6) + 1;
hall_to_phase_table[8 + i] = ((hall_to_phase_table[8 + i] + fwd_add) % 6) + 1;
}
}
static void do_dc_cal(void) {
DCCAL_ON();
while(IS_DRV_FAULT()){};
chThdSleepMilliseconds(1000);
curr0_sum = 0;
curr1_sum = 0;
curr_start_samples = 0;
while(curr_start_samples < 4000) {};
curr0_offset = curr0_sum / curr_start_samples;
curr1_offset = curr1_sum / curr_start_samples;
DCCAL_OFF();
}
/**
* Use duty cycle control. Absolute values less than MCPWM_MIN_DUTY_CYCLE will
* stop the motor.
*
* @param dutyCycle
* The duty cycle to use.
*/
void mcpwm_set_duty(float dutyCycle) {
if (try_input()) {
return;
}
control_mode = CONTROL_MODE_DUTY;
set_duty_cycle_hl(dutyCycle);
}
/**
* Use PID rpm control. Note that this value has to be multiplied by half of
* the number of motor poles.
*
* @param rpm
* The electrical RPM goal value to use.
*/
void mcpwm_set_pid_speed(float rpm) {
if (try_input()) {
return;
}
control_mode = CONTROL_MODE_SPEED;
speed_pid_set_rpm = rpm;
}
/**
* Use current control and specify a goal current to use. The sign determines
* the direction of the torque. Absolute values less than
* conf.cc_min_current will release the motor.
*
* @param current
* The current to use.
*/
void mcpwm_set_current(float current) {
if (try_input()) {
return;
}
if (fabsf(current) < conf.cc_min_current) {
control_mode = CONTROL_MODE_NONE;
stop_pwm_ll();
return;
}
utils_truncate_number(¤t, conf.l_current_min, conf.l_current_max);
control_mode = CONTROL_MODE_CURRENT;
current_set = current;
if (state != MC_STATE_RUNNING) {
set_duty_cycle_hl(SIGN(current) * MCPWM_MIN_DUTY_CYCLE);
}
}
/**
* Brake the motor with a desired current. Absolute values less than
* conf.cc_min_current will release the motor.
*
* @param current
* The current to use. Positive and negative values give the same effect.
*/
void mcpwm_set_brake_current(float current) {
if (try_input()) {
return;
}
if (fabsf(current) < conf.cc_min_current) {
control_mode = CONTROL_MODE_NONE;
stop_pwm_ll();
return;
}
utils_truncate_number(¤t, -fabsf(conf.l_current_min), fabsf(conf.l_current_min));
control_mode = CONTROL_MODE_CURRENT_BRAKE;
current_set = current;
if (state != MC_STATE_RUNNING) {
// In case the motor is already spinning, set the state to running
// so that it can be ramped down before the full brake is applied.
if (fabsf(rpm_now) > conf.l_max_erpm_fbrake) {
state = MC_STATE_RUNNING;
} else {
full_brake_ll();
}
}
}
/**
* Stop the motor and use braking.
*/
void mcpwm_brake_now(void) {
mcpwm_set_duty(0.0);
}
/**
* Disconnect the motor and let it turn freely.
*/
void mcpwm_release_motor(void) {
mcpwm_set_current(0.0);
}
/**
* Get the electrical position (or commutation step) of the motor.
*
* @return
* The current commutation step. Range [1 6]
*/
int mcpwm_get_comm_step(void) {
return comm_step;
}
float mcpwm_get_duty_cycle_set(void) {
return dutycycle_set;
}
float mcpwm_get_duty_cycle_now(void) {
return dutycycle_now;
}
/**
* Get the current switching frequency.
*
* @return
* The switching frequency in Hz.
*/
float mcpwm_get_switching_frequency_now(void) {
return switching_frequency_now;
}
/**
* Calculate the current RPM of the motor. This is a signed value and the sign
* depends on the direction the motor is rotating in. Note that this value has
* to be divided by half the number of motor poles.
*
* @return
* The RPM value.
*/
float mcpwm_get_rpm(void) {
return direction ? rpm_now : -rpm_now;
}
mc_state mcpwm_get_state(void) {
return state;
}
mc_fault_code mcpwm_get_fault(void) {
return fault_now;
}
/**
* Calculate the KV (RPM per volt) value for the motor. This function has to
* be used while the motor is moving. Note that the return value has to be
* divided by half the number of motor poles.
*
* @return
* The KV value.
*/
float mcpwm_get_kv(void) {
return rpm_now / (GET_INPUT_VOLTAGE() * fabsf(dutycycle_now));
}
/**
* Calculate the FIR-filtered KV (RPM per volt) value for the motor. This
* function has to be used while the motor is moving. Note that the return
* value has to be divided by half the number of motor poles.
*
* @return
* The filtered KV value.
*/
float mcpwm_get_kv_filtered(void) {
float value = filter_run_fir_iteration((float*)kv_fir_samples,
(float*)kv_fir_coeffs, KV_FIR_TAPS_BITS, kv_fir_index);
return value;
}
/**
* Get the motor current.
*
* @return
* The motor current.
*/
float mcpwm_get_tot_current(void) {
return last_current_sample * (V_REG / 4095.0) / (CURRENT_SHUNT_RES * CURRENT_AMP_GAIN);
}
/**
* Get the FIR-filtered motor current.
*
* @return
* The filtered motor current.
*/
float mcpwm_get_tot_current_filtered(void) {
return last_current_sample_filtered * (V_REG / 4095.0) / (CURRENT_SHUNT_RES * CURRENT_AMP_GAIN);
}
/**
* Get the input current to the motor controller.
*
* @return
* The input current.
*/
float mcpwm_get_tot_current_in(void) {
return mcpwm_get_tot_current() * fabsf(dutycycle_now);
}
/**
* Get the FIR-filtered input current to the motor controller.
*
* @return
* The filtered input current.
*/
float mcpwm_get_tot_current_in_filtered(void) {
return mcpwm_get_tot_current_filtered() * fabsf(dutycycle_now);
}
/**
* Read the number of steps the motor has rotated. This number is signed and
* will return a negative number when the motor is rotating backwards.
*
* @param reset
* If true (!= 0), the tachometer counter will be reset after this call.
*
* @return
* The tachometer value in motor steps. The number of motor revolutions will
* be this number divided by (3 * MOTOR_POLE_NUMBER).
*/
int mcpwm_get_tachometer_value(int reset) {
int val = tachometer;
if (reset) {
tachometer = 0;
}
return val;
}
static void stop_pwm_ll(void) {
state = MC_STATE_OFF;
ignore_iterations = MCPWM_CMD_STOP_TIME;
stop_pwm_hw();
}
static void stop_pwm_hw(void) {
TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_ForcedAction_InActive);
TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Enable);
TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Disable);
TIM_SelectOCxM(TIM1, TIM_Channel_2, TIM_ForcedAction_InActive);
TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Enable);
TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Disable);
TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_ForcedAction_InActive);
TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Enable);
TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Disable);
TIM_GenerateEvent(TIM1, TIM_EventSource_COM);
set_switching_frequency(MCPWM_SWITCH_FREQUENCY_MAX);
}
static void full_brake_ll(void) {
state = MC_STATE_FULL_BRAKE;
ignore_iterations = MCPWM_CMD_STOP_TIME;
full_brake_hw();
}
static void full_brake_hw(void) {
TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_ForcedAction_InActive);
TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Enable);
TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Enable);
TIM_SelectOCxM(TIM1, TIM_Channel_2, TIM_ForcedAction_InActive);
TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Enable);
TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Enable);
TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_ForcedAction_InActive);
TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Enable);
TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Enable);
TIM_GenerateEvent(TIM1, TIM_EventSource_COM);
set_switching_frequency(MCPWM_SWITCH_FREQUENCY_MAX);
}
static void fault_stop(mc_fault_code fault) {
ignore_iterations = MCPWM_FAULT_STOP_TIME;
control_mode = CONTROL_MODE_NONE;
state = MC_STATE_OFF;
stop_pwm_hw();
fault_now = fault;
}
/**
* A helper function that should be called before sending commands to control
* the motor. If the state is detecting, the detection will be stopped.
*
* @return
* The amount if milliseconds left until user commands are allowed again.
*
*/
static int try_input(void) {
if (state == MC_STATE_DETECTING) {
state = MC_STATE_OFF;
stop_pwm_hw();
ignore_iterations = MCPWM_DETECT_STOP_TIME;
}
return ignore_iterations;
}
/**
* High-level duty cycle setter. Will set the ramping goal of the duty cycle.
* If motor is not running, it will be started in different ways depending on
* whether it is moving or not.
*
* @param dutyCycle
* The duty cycle in the range [-MCPWM_MAX_DUTY_CYCLE MCPWM_MAX_DUTY_CYCLE]
* If the absolute value of the duty cycle is less than MCPWM_MIN_DUTY_CYCLE,
* the motor phases will be shorted to brake the motor.
*/
static void set_duty_cycle_hl(float dutyCycle) {
utils_truncate_number(&dutyCycle, -MCPWM_MAX_DUTY_CYCLE, MCPWM_MAX_DUTY_CYCLE);
if (state == MC_STATE_DETECTING) {
stop_pwm_ll();
return;
}
dutycycle_set = dutyCycle;
if (state != MC_STATE_RUNNING) {
if (fabsf(dutyCycle) >= MCPWM_MIN_DUTY_CYCLE) {
// dutycycle_now is updated by the back-emf detection. If the motor already
// is spinning, it will be non-zero.
if (fabsf(dutycycle_now) < MCPWM_MIN_DUTY_CYCLE) {
dutycycle_now = SIGN(dutyCycle) * MCPWM_MIN_DUTY_CYCLE;
}
set_duty_cycle_ll(dutycycle_now);
} else {
// In case the motor is already spinning, set the state to running
// so that it can be ramped down before the full brake is applied.
if (fabsf(rpm_now) > conf.l_max_erpm_fbrake) {
state = MC_STATE_RUNNING;
} else {
full_brake_ll();
}
}
}
}
/**
* Low-level duty cycle setter. Will update the state of the application
* and the motor direction accordingly.
*
* This function should be used with care. Ramping together with current
* limiting should be used.
*
* @param dutyCycle
* The duty cycle in the range [-MCPWM_MAX_DUTY_CYCLE MCPWM_MAX_DUTY_CYCLE]
* If the absolute value of the duty cycle is less than MCPWM_MIN_DUTY_CYCLE,
* the motor will be switched off.
*/
static void set_duty_cycle_ll(float dutyCycle) {
if (dutyCycle >= MCPWM_MIN_DUTY_CYCLE) {
direction = 1;
} else if (dutyCycle <= -MCPWM_MIN_DUTY_CYCLE) {
dutyCycle = -dutyCycle;
direction = 0;
}
if (dutyCycle < MCPWM_MIN_DUTY_CYCLE) {
switch (state) {
case MC_STATE_RUNNING:
full_brake_ll();
break;
case MC_STATE_DETECTING:
stop_pwm_ll();
break;
default:
break;
}
return;
} else if (dutyCycle > MCPWM_MAX_DUTY_CYCLE) {
dutyCycle = MCPWM_MAX_DUTY_CYCLE;
}
set_duty_cycle_hw(dutyCycle);
if (conf.sl_is_sensorless) {
if (state != MC_STATE_RUNNING) {
state = MC_STATE_RUNNING;
if (rpm_now < conf.sl_min_erpm) {
commutate();
}
}
} else {
if (state != MC_STATE_RUNNING) {
state = MC_STATE_RUNNING;
comm_step = mcpwm_read_hall_phase();
set_next_comm_step(comm_step);
commutate();
}
}
}
/**
* Lowest level (hardware) duty cycle setter. Will set the hardware timer to
* the specified duty cycle and update the ADC sampling positions.
*
* @param dutyCycle
* The duty cycle in the range [MCPWM_MIN_DUTY_CYCLE MCPWM_MAX_DUTY_CYCLE]
* (Only positive)
*/
static void set_duty_cycle_hw(float dutyCycle) {
mc_timer_struct timer_tmp;
utils_sys_lock_cnt();
memcpy(&timer_tmp, (void*)&timer_struct, sizeof(mc_timer_struct));
utils_sys_unlock_cnt();
utils_truncate_number(&dutyCycle, MCPWM_MIN_DUTY_CYCLE, MCPWM_MAX_DUTY_CYCLE);
if (conf.pwm_mode == PWM_MODE_BIPOLAR && !IS_DETECTING()) {
timer_tmp.duty = (uint16_t) (((float) timer_tmp.top / 2.0) * dutyCycle
+ ((float) timer_tmp.top / 2.0));
} else {
timer_tmp.duty = (uint16_t)((float)timer_tmp.top * dutyCycle);
}
if (IS_DETECTING() || conf.pwm_mode == PWM_MODE_BIPOLAR) {
switching_frequency_now = MCPWM_SWITCH_FREQUENCY_MAX;
} else {
switching_frequency_now = (float)MCPWM_SWITCH_FREQUENCY_MIN * (1.0 - fabsf(dutyCycle)) +
(float)MCPWM_SWITCH_FREQUENCY_MAX * fabsf(dutyCycle);
}
timer_tmp.top = SYSTEM_CORE_CLOCK / (int)switching_frequency_now;
update_adc_sample_pos(&timer_tmp);
set_next_timer_settings(&timer_tmp);
}
static void run_pid_controller(void) {
static float i_term = 0;
static float prev_error = 0;
float p_term;
float d_term;
// PID is off. Return.
if (control_mode != CONTROL_MODE_SPEED) {
i_term = 0;
prev_error = 0;
return;
}
// Too low RPM set. Stop and return.
if (fabsf(speed_pid_set_rpm) < conf.s_pid_min_rpm) {
i_term = 0;
prev_error = 0;
mcpwm_set_duty(0.0);
return;
}
// Compensation for supply voltage variations
float scale = 1.0 / GET_INPUT_VOLTAGE();
// Compute error
float error = speed_pid_set_rpm - mcpwm_get_rpm();
// Compute parameters
p_term = error * conf.s_pid_kp * scale;
i_term += error * (conf.s_pid_ki * MCPWM_PID_TIME_K) * scale;
d_term = (error - prev_error) * (conf.s_pid_kd / MCPWM_PID_TIME_K) * scale;
// I-term wind-up protection
utils_truncate_number(&i_term, -1.0, 1.0);
// Store previous error
prev_error = error;
// Calculate output
float output = p_term + i_term + d_term;
// Make sure that at least minimum output is used
if (fabsf(output) < MCPWM_MIN_DUTY_CYCLE) {