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AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

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Name		Name	Last commit message	Last commit date
Latest commit History 34 Commits
scripts		scripts
src		src
test		test
.gitignore		.gitignore
.gitlab-ci.yml		.gitlab-ci.yml
Bender.yml		Bender.yml
CHANGELOG.md		CHANGELOG.md
LICENSE		LICENSE
README.md		README.md
src_files.yml		src_files.yml

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AXI

This is the implementation of the AMBA AXI protocol developed as part of the PULP platform as ETH Zurich. This repository will eventually contain interface definitions, crossbars, data width converters, traffic generators, and testbench utilities.

We implement AXI4 and AXI4-Lite.