PicoRV32 - A Size-Optimized RISC-V CPU

Verilog AXI components for FPGA implementation

Verilog PCI express components

An Open-source FPGA IP Generator

Repository for basic (and not so basic) Verilog blocks with high re-use potential

A simple DDR3 memory controller

C++ SystemC Implementation of a Systolic Array

FYP

Release of code written to experiment with formally verified translation validators for Compcert.