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ppc: load/store multiple and string insns don't do LE
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Just generate an alignment interrupt

Signed-off-by: Benjamin Herrenschmidt <[email protected]>
Signed-off-by: David Gibson <[email protected]>
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ozbenh authored and dgibson committed Sep 7, 2016
1 parent 65f2475 commit 5817355
Showing 1 changed file with 29 additions and 0 deletions.
29 changes: 29 additions & 0 deletions target-ppc/translate.c
Original file line number Diff line number Diff line change
Expand Up @@ -2889,6 +2889,11 @@ static void gen_lmw(DisasContext *ctx)
{
TCGv t0;
TCGv_i32 t1;

if (ctx->le_mode) {
gen_align_no_le(ctx);
return;
}
gen_set_access_type(ctx, ACCESS_INT);
t0 = tcg_temp_new();
t1 = tcg_const_i32(rD(ctx->opcode));
Expand All @@ -2903,6 +2908,11 @@ static void gen_stmw(DisasContext *ctx)
{
TCGv t0;
TCGv_i32 t1;

if (ctx->le_mode) {
gen_align_no_le(ctx);
return;
}
gen_set_access_type(ctx, ACCESS_INT);
t0 = tcg_temp_new();
t1 = tcg_const_i32(rS(ctx->opcode));
Expand All @@ -2929,6 +2939,10 @@ static void gen_lswi(DisasContext *ctx)
int ra = rA(ctx->opcode);
int nr;

if (ctx->le_mode) {
gen_align_no_le(ctx);
return;
}
if (nb == 0)
nb = 32;
nr = (nb + 3) / 4;
Expand All @@ -2952,6 +2966,11 @@ static void gen_lswx(DisasContext *ctx)
{
TCGv t0;
TCGv_i32 t1, t2, t3;

if (ctx->le_mode) {
gen_align_no_le(ctx);
return;
}
gen_set_access_type(ctx, ACCESS_INT);
t0 = tcg_temp_new();
gen_addr_reg_index(ctx, t0);
Expand All @@ -2971,6 +2990,11 @@ static void gen_stswi(DisasContext *ctx)
TCGv t0;
TCGv_i32 t1, t2;
int nb = NB(ctx->opcode);

if (ctx->le_mode) {
gen_align_no_le(ctx);
return;
}
gen_set_access_type(ctx, ACCESS_INT);
t0 = tcg_temp_new();
gen_addr_register(ctx, t0);
Expand All @@ -2989,6 +3013,11 @@ static void gen_stswx(DisasContext *ctx)
{
TCGv t0;
TCGv_i32 t1, t2;

if (ctx->le_mode) {
gen_align_no_le(ctx);
return;
}
gen_set_access_type(ctx, ACCESS_INT);
t0 = tcg_temp_new();
gen_addr_reg_index(ctx, t0);
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