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Starred repositories

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List of Computer Science courses with video lectures.

67,775 9,181 Updated Sep 13, 2024

API Blueprint for Hologram's REST API

API Blueprint 10 23 Updated Dec 8, 2023

A curated list of awesome embedded programming.

6,305 955 Updated Dec 3, 2024

A curated list of awesome MATLAB toolboxes, applications, software and resources.

360 100 Updated May 8, 2024

A curated list of awesome C++ (or C) frameworks, libraries, resources, and shiny things. Inspired by awesome-... stuff.

61,136 7,878 Updated Jan 12, 2025

Continuing the development of awesome-c list on GitHub

3,521 358 Updated Sep 27, 2022

A curated list of delightful and free automotive engineering resources, looking for contributors ❗

865 176 Updated Jan 7, 2025

RISC-V CPU Core (RV32IM)

Verilog 1,320 240 Updated Sep 18, 2021

32-bit Superscalar RISC-V CPU

Verilog 911 153 Updated Sep 18, 2021

Library for SARA-R410M-02B.

C 4 Updated Jan 9, 2019

STM32Cube MCU Full Package for the STM32F3 series - (HAL + LL Drivers, CMSIS Core, CMSIS Device, MW libraries plus a set of Projects running on all boards provided by ST (Nucleo, Evaluation and Dis…

C 142 56 Updated Nov 25, 2024

STM32Cube MCU Full Package for the STM32L4 series - (HAL + LL Drivers, CMSIS Core, CMSIS Device, MW libraries plus a set of Projects running on all boards provided by ST (Nucleo, Evaluation and Dis…

C 284 157 Updated Dec 13, 2024

STM32Cube MCU Full Package for the STM32F4 series - (HAL + LL Drivers, CMSIS Core, CMSIS Device, MW libraries plus a set of Projects running on all boards provided by ST (Nucleo, Evaluation and Dis…

C 926 426 Updated Nov 22, 2024

Instruction Set Generator initially contributed by Futurewei

C++ 271 61 Updated Oct 17, 2023

Freedom U540-C000 Bootloader Code

C 84 38 Updated Jul 13, 2020

Xilinx Tcl Store

Tcl 350 190 Updated Dec 24, 2024

Verilog SDRAM memory controller

Verilog 313 95 Updated May 13, 2017

This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.

SystemVerilog 397 168 Updated Oct 25, 2024

This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain accelerated by a PULP cluster with 8 cores.

SystemVerilog 465 116 Updated Nov 26, 2024

An open-source microcontroller system based on RISC-V

C 1 Updated Jul 24, 2018

Python CAN Viewer

Python 13 2 Updated Jul 6, 2022

Master the command line, in one page

154,341 14,588 Updated Jun 25, 2024

chisel tutorial exercises and answers

Scala 706 199 Updated Jan 6, 2022

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

Assembly 2,337 707 Updated Jan 10, 2025

A port of FreeRTOS for the RISC-V ISA

C 75 42 Updated Apr 22, 2019

RISC-V Opcodes

Python 710 311 Updated Jan 9, 2025

Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2

Verilog 2,648 1,020 Updated Mar 24, 2021

The LIN protocol implemented over Arduino APIs (Serial and Digital IO)

C++ 122 46 Updated Jan 23, 2021

An open-source microcontroller system based on RISC-V

C 915 300 Updated Feb 6, 2024
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