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Tx logs buss mapping (scroll-tech#476)
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* rebase to main and replace log cirucit with bussmapping

* modi single circuit step&pass

* add multi log steps test

* rebase to main and minor update

* fix index lookup and tag overlap issue

* refactor txlog write op style and tests

* fix comment

* enable commented tests

* fix ci test error

* fix comment line

* minor updates

* fix comment
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DreamWuGit authored Jun 7, 2022
1 parent 519ad61 commit 9da18be
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Showing 14 changed files with 834 additions and 384 deletions.
14 changes: 13 additions & 1 deletion bus-mapping/src/circuit_input_builder/execution.rs
Original file line number Diff line number Diff line change
Expand Up @@ -49,6 +49,7 @@ impl ExecStep {
call_index: usize,
rwc: RWCounter,
reversible_write_counter: usize,
log_id: usize,
) -> Self {
ExecStep {
exec_state: ExecState::Op(step.op),
Expand All @@ -61,7 +62,7 @@ impl ExecStep {
call_index,
rwc,
reversible_write_counter,
log_id: 0,
log_id,
bus_mapping_instance: Vec::new(),
error: None,
aux_data: None,
Expand Down Expand Up @@ -101,6 +102,8 @@ pub enum ExecState {
EndTx,
/// Virtual step Copy To Memory
CopyToMemory,
/// Virtual step Copy To Log
CopyToLog,
/// Virtal step Copy Code To Memory
CopyCodeToMemory,
}
Expand Down Expand Up @@ -132,6 +135,15 @@ impl ExecState {
false
}
}

/// Returns `true` if `ExecState` is an opcode and the opcode is a `Logn`.
pub fn is_log(&self) -> bool {
if let ExecState::Op(op) = self {
op.is_log()
} else {
false
}
}
}

/// Provides specific details about the data copy for which an
Expand Down
34 changes: 33 additions & 1 deletion bus-mapping/src/circuit_input_builder/input_state_ref.rs
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@ use crate::{
exec_trace::OperationRef,
operation::{
AccountField, AccountOp, CallContextField, CallContextOp, MemoryOp, Op, OpEnum, Operation,
StackOp, Target, RW,
StackOp, Target, TxLogField, TxLogOp, RW,
},
state_db::{CodeDB, StateDB},
Error,
Expand Down Expand Up @@ -41,11 +41,19 @@ impl<'a> CircuitInputStateRef<'a> {
/// Create a new step from a `GethExecStep`
pub fn new_step(&self, geth_step: &GethExecStep) -> Result<ExecStep, Error> {
let call_ctx = self.tx_ctx.call_ctx()?;

let pre_log_id = if self.tx.is_steps_empty() {
0
} else {
self.tx.last_step().log_id
};

Ok(ExecStep::new(
geth_step,
call_ctx.index,
self.block_ctx.rwc,
call_ctx.reversible_write_counter,
pre_log_id,
))
}

Expand Down Expand Up @@ -76,6 +84,7 @@ impl<'a> CircuitInputStateRef<'a> {
} else {
0
},
log_id: prev_step.log_id,
..Default::default()
}
}
Expand Down Expand Up @@ -271,6 +280,29 @@ impl<'a> CircuitInputStateRef<'a> {
Ok(())
}

/// Push a write type [`TxLogOp`] into the
/// [`OperationContainer`](crate::operation::OperationContainer) with the
/// next [`RWCounter`](crate::operation::RWCounter), and then
/// adds a reference to the stored operation ([`OperationRef`]) inside
/// the bus-mapping instance of the current [`ExecStep`]. Then increase
/// the `block_ctx` [`RWCounter`](crate::operation::RWCounter) by one.
pub fn tx_log_write(
&mut self,
step: &mut ExecStep,
tx_id: usize,
log_id: usize,
field: TxLogField,
index: usize,
value: Word,
) -> Result<(), Error> {
self.push_op(
step,
RW::WRITE,
TxLogOp::new(tx_id, log_id, field, index, value),
);
Ok(())
}

/// Push 2 reversible [`AccountOp`] to update `sender` and `receiver`'s
/// balance by `value`, with `sender` being extraly charged with `fee`.
pub fn transfer_with_fee(
Expand Down
9 changes: 8 additions & 1 deletion bus-mapping/src/circuit_input_builder/tracer_tests.rs
Original file line number Diff line number Diff line change
Expand Up @@ -47,11 +47,18 @@ impl CircuitInputBuilderTx {
false,
)
.unwrap();

let prev_log_id = if tx.is_steps_empty() {
0
} else {
tx.last_step().log_id
};

Self {
builder,
tx,
tx_ctx,
step: ExecStep::new(geth_step, 0, RWCounter::new(), 0),
step: ExecStep::new(geth_step, 0, RWCounter::new(), 0, prev_log_id),
}
}

Expand Down
14 changes: 14 additions & 0 deletions bus-mapping/src/circuit_input_builder/transaction.rs
Original file line number Diff line number Diff line change
Expand Up @@ -282,4 +282,18 @@ impl Transaction {
pub(crate) fn push_call(&mut self, call: Call) {
self.calls.push(call);
}

/// Return last step in this transaction.
pub fn last_step(&self) -> &ExecStep {
if self.steps().is_empty() {
panic!("there is no steps in tx");
}

&self.steps[self.steps.len() - 1]
}

/// Return whether the steps in this transaction is empty
pub fn is_steps_empty(&self) -> bool {
self.steps.is_empty()
}
}
12 changes: 7 additions & 5 deletions bus-mapping/src/evm/opcodes.rs
Original file line number Diff line number Diff line change
Expand Up @@ -28,6 +28,7 @@ mod codecopy;
mod dup;
mod extcodehash;
mod gasprice;
mod logs;
mod mload;
mod mstore;
mod number;
Expand All @@ -49,6 +50,7 @@ use codecopy::Codecopy;
use dup::Dup;
use extcodehash::Extcodehash;
use gasprice::GasPrice;
use logs::Log;
use mload::Mload;
use mstore::Mstore;
use origin::Origin;
Expand Down Expand Up @@ -188,11 +190,11 @@ fn fn_gen_associated_ops(opcode_id: &OpcodeId) -> FnGenAssociatedOps {
OpcodeId::SWAP14 => Swap::<14>::gen_associated_ops,
OpcodeId::SWAP15 => Swap::<15>::gen_associated_ops,
OpcodeId::SWAP16 => Swap::<16>::gen_associated_ops,
// OpcodeId::LOG0 => {},
// OpcodeId::LOG1 => {},
// OpcodeId::LOG2 => {},
// OpcodeId::LOG3 => {},
// OpcodeId::LOG4 => {},
OpcodeId::LOG0 => Log::gen_associated_ops,
OpcodeId::LOG1 => Log::gen_associated_ops,
OpcodeId::LOG2 => Log::gen_associated_ops,
OpcodeId::LOG3 => Log::gen_associated_ops,
OpcodeId::LOG4 => Log::gen_associated_ops,
// OpcodeId::CREATE => {},
OpcodeId::CALL => Call::gen_associated_ops,
// OpcodeId::CALLCODE => {},
Expand Down
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