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Merge tag 'char-misc-3.15-rc1' of git://git.kernel.org/pub/scm/linux/…
…kernel/git/gregkh/char-misc Pull char/misc driver patches from Greg KH: "Here's the big char/misc driver updates for 3.15-rc1. Lots of various things here, including the new mcb driver subsystem. All of these have been in linux-next for a while" * tag 'char-misc-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (118 commits) extcon: Move OF helper function to extcon core and change function name extcon: of: Remove unnecessary function call by using the name of device_node extcon: gpio: Use SIMPLE_DEV_PM_OPS macro extcon: palmas: Use SIMPLE_DEV_PM_OPS macro mei: don't use deprecated DEFINE_PCI_DEVICE_TABLE macro mei: amthif: fix checkpatch error mei: client.h fix checkpatch errors mei: use cl_dbg where appropriate mei: fix Unnecessary space after function pointer name mei: report consistently copy_from/to_user failures mei: drop pr_fmt macros mei: make me hw headers private to me hw. mei: fix memory leak of pending write cb objects mei: me: do not reset when less than expected data is received drivers: mcb: Fix build error discovered by 0-day bot cs5535-mfgpt: Simplify dependencies spmi: pm: drop bus-level PM suspend/resume routines spmi: pmic_arb: make selectable on ARCH_QCOM Drivers: hv: vmbus: Increase the limit on the number of pfns we can handle pch_phub: Report error writing MAC back to user ...
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<?xml version="1.0" encoding="UTF-8"?> | ||
<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN" | ||
"http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []> | ||
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<book id="w1id"> | ||
<bookinfo> | ||
<title>W1: Dallas' 1-wire bus</title> | ||
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<authorgroup> | ||
<author> | ||
<firstname>David</firstname> | ||
<surname>Fries</surname> | ||
<affiliation> | ||
<address> | ||
<email>[email protected]</email> | ||
</address> | ||
</affiliation> | ||
</author> | ||
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</authorgroup> | ||
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<copyright> | ||
<year>2013</year> | ||
<!-- | ||
<holder></holder> | ||
--> | ||
</copyright> | ||
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<legalnotice> | ||
<para> | ||
This documentation is free software; you can redistribute | ||
it and/or modify it under the terms of the GNU General Public | ||
License version 2. | ||
</para> | ||
|
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<para> | ||
This program is distributed in the hope that it will be | ||
useful, but WITHOUT ANY WARRANTY; without even the implied | ||
warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. | ||
For more details see the file COPYING in the source | ||
distribution of Linux. | ||
</para> | ||
</legalnotice> | ||
</bookinfo> | ||
|
||
<toc></toc> | ||
|
||
<chapter id="w1_internal"> | ||
<title>W1 API internal to the kernel</title> | ||
|
||
<sect1 id="w1_internal_api"> | ||
<title>W1 API internal to the kernel</title> | ||
<sect2 id="w1.h"> | ||
<title>drivers/w1/w1.h</title> | ||
<para>W1 core functions.</para> | ||
!Idrivers/w1/w1.h | ||
</sect2> | ||
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<sect2 id="w1.c"> | ||
<title>drivers/w1/w1.c</title> | ||
<para>W1 core functions.</para> | ||
!Idrivers/w1/w1.c | ||
</sect2> | ||
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<sect2 id="w1_family.h"> | ||
<title>drivers/w1/w1_family.h</title> | ||
<para>Allows registering device family operations.</para> | ||
!Idrivers/w1/w1_family.h | ||
</sect2> | ||
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<sect2 id="w1_family.c"> | ||
<title>drivers/w1/w1_family.c</title> | ||
<para>Allows registering device family operations.</para> | ||
!Edrivers/w1/w1_family.c | ||
</sect2> | ||
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<sect2 id="w1_int.c"> | ||
<title>drivers/w1/w1_int.c</title> | ||
<para>W1 internal initialization for master devices.</para> | ||
!Edrivers/w1/w1_int.c | ||
</sect2> | ||
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<sect2 id="w1_netlink.h"> | ||
<title>drivers/w1/w1_netlink.h</title> | ||
<para>W1 external netlink API structures and commands.</para> | ||
!Idrivers/w1/w1_netlink.h | ||
</sect2> | ||
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<sect2 id="w1_io.c"> | ||
<title>drivers/w1/w1_io.c</title> | ||
<para>W1 input/output.</para> | ||
!Edrivers/w1/w1_io.c | ||
!Idrivers/w1/w1_io.c | ||
</sect2> | ||
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</sect1> | ||
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</chapter> | ||
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</book> |
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210
Documentation/devicetree/bindings/memory-controllers/ti-aemif.txt
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* Device tree bindings for Texas instruments AEMIF controller | ||
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The Async External Memory Interface (EMIF16/AEMIF) controller is intended to | ||
provide a glue-less interface to a variety of asynchronous memory devices like | ||
ASRA M, NOR and NAND memory. A total of 256M bytes of any of these memories | ||
can be accessed at any given time via four chip selects with 64M byte access | ||
per chip select. Synchronous memories such as DDR1 SD RAM, SDR SDRAM | ||
and Mobile SDR are not supported. | ||
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Documentation: | ||
Davinci DM646x - http://www.ti.com/lit/ug/sprueq7c/sprueq7c.pdf | ||
OMAP-L138 (DA850) - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf | ||
Kestone - http://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf | ||
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Required properties: | ||
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- compatible: "ti,davinci-aemif" | ||
"ti,keystone-aemif" | ||
"ti,da850-aemif" | ||
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- reg: contains offset/length value for AEMIF control registers | ||
space. | ||
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- #address-cells: Must be 2. The partition number has to be encoded in the | ||
first address cell and it may accept values 0..N-1 | ||
(N - total number of partitions). It's recommended to | ||
assign N-1 number for the control partition. The second | ||
cell is the offset into the partition. | ||
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- #size-cells: Must be set to 1. | ||
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- ranges: Contains memory regions. There are two types of | ||
ranges/partitions: | ||
- CS-specific partition/range. If continuous, must be | ||
set up to reflect the memory layout for 4 chipselects, | ||
if not then additional range/partition can be added and | ||
child device can select the proper one. | ||
- control partition which is common for all CS | ||
interfaces. | ||
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- clocks: the clock feeding the controller clock. Required only | ||
if clock tree data present in device tree. | ||
See clock-bindings.txt | ||
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- clock-names: clock name. It has to be "aemif". Required only if clock | ||
tree data present in device tree, in another case don't | ||
use it. | ||
See clock-bindings.txt | ||
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- clock-ranges: Empty property indicating that child nodes can inherit | ||
named clocks. Required only if clock tree data present | ||
in device tree. | ||
See clock-bindings.txt | ||
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Child chip-select (cs) nodes contain the memory devices nodes connected to | ||
such as NOR (e.g. cfi-flash) and NAND (ti,davinci-nand, see davinci-nand.txt). | ||
There might be board specific devices like FPGAs. | ||
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Required child cs node properties: | ||
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- #address-cells: Must be 2. | ||
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- #size-cells: Must be 1. | ||
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- ranges: Empty property indicating that child nodes can inherit | ||
memory layout. | ||
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- clock-ranges: Empty property indicating that child nodes can inherit | ||
named clocks. Required only if clock tree data present | ||
in device tree. | ||
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- ti,cs-chipselect: number of chipselect. Indicates on the aemif driver | ||
which chipselect is used for accessing the memory. For | ||
compatibles "ti,davinci-aemif" and "ti,keystone-aemif" | ||
it can be in range [0-3]. For compatible | ||
"ti,da850-aemif" range is [2-5]. | ||
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Optional child cs node properties: | ||
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- ti,cs-bus-width: width of the asynchronous device's data bus | ||
8 or 16 if not preset 8 | ||
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- ti,cs-select-strobe-mode: enable/disable select strobe mode | ||
In select strobe mode chip select behaves as | ||
the strobe and is active only during the strobe | ||
period. If present then enable. | ||
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- ti,cs-extended-wait-mode: enable/disable extended wait mode | ||
if set, the controller monitors the EMIFWAIT pin | ||
mapped to that chip select to determine if the | ||
device wants to extend the strobe period. If | ||
present then enable. | ||
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- ti,cs-min-turnaround-ns: minimum turn around time, ns | ||
Time between the end of one asynchronous memory | ||
access and the start of another asynchronous | ||
memory access. This delay is not incurred | ||
between a read followed by read or a write | ||
followed by a write to same chip select. | ||
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- ti,cs-read-setup-ns: read setup width, ns | ||
Time between the beginning of a memory cycle | ||
and the activation of read strobe. | ||
Minimum value is 1 (0 treated as 1). | ||
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- ti,cs-read-strobe-ns: read strobe width, ns | ||
Time between the activation and deactivation of | ||
the read strobe. | ||
Minimum value is 1 (0 treated as 1). | ||
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- ti,cs-read-hold-ns: read hold width, ns | ||
Time between the deactivation of the read | ||
strobe and the end of the cycle (which may be | ||
either an address change or the deactivation of | ||
the chip select signal. | ||
Minimum value is 1 (0 treated as 1). | ||
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- ti,cs-write-setup-ns: write setup width, ns | ||
Time between the beginning of a memory cycle | ||
and the activation of write strobe. | ||
Minimum value is 1 (0 treated as 1). | ||
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- ti,cs-write-strobe-ns: write strobe width, ns | ||
Time between the activation and deactivation of | ||
the write strobe. | ||
Minimum value is 1 (0 treated as 1). | ||
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- ti,cs-write-hold-ns: write hold width, ns | ||
Time between the deactivation of the write | ||
strobe and the end of the cycle (which may be | ||
either an address change or the deactivation of | ||
the chip select signal. | ||
Minimum value is 1 (0 treated as 1). | ||
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If any of the above parameters are absent, current parameter value will be taken | ||
from the corresponding HW reg. | ||
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Example for aemif, davinci nand and nor flash chip select shown below. | ||
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memory-controller@21000A00 { | ||
compatible = "ti,davinci-aemif"; | ||
#address-cells = <2>; | ||
#size-cells = <1>; | ||
clocks = <&clkaemif 0>; | ||
clock-names = "aemif"; | ||
clock-ranges; | ||
reg = <0x21000A00 0x00000100>; | ||
ranges = <0 0 0x70000000 0x10000000 | ||
1 0 0x21000A00 0x00000100>; | ||
/* | ||
* Partition0: CS-specific memory range which is | ||
* implemented as continuous physical memory region | ||
* Partition1: control memory range | ||
*/ | ||
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nand:cs2 { | ||
#address-cells = <2>; | ||
#size-cells = <1>; | ||
clock-ranges; | ||
ranges; | ||
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ti,cs-chipselect = <2>; | ||
/* all timings in nanoseconds */ | ||
ti,cs-min-turnaround-ns = <0>; | ||
ti,cs-read-hold-ns = <7>; | ||
ti,cs-read-strobe-ns = <42>; | ||
ti,cs-read-setup-ns = <14>; | ||
ti,cs-write-hold-ns = <7>; | ||
ti,cs-write-strobe-ns = <42>; | ||
ti,cs-write-setup-ns = <14>; | ||
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nand@0,0x8000000 { | ||
compatible = "ti,davinci-nand"; | ||
reg = <0 0x8000000 0x4000000 | ||
1 0x0000000 0x0000100>; | ||
/* | ||
* Partition0, offset 0x8000000, size 0x4000000 | ||
* Partition1, offset 0x0000000, size 0x0000100 | ||
*/ | ||
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.. see davinci-nand.txt | ||
}; | ||
}; | ||
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nor:cs0 { | ||
#address-cells = <2>; | ||
#size-cells = <1>; | ||
clock-ranges; | ||
ranges; | ||
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ti,cs-chipselect = <0>; | ||
/* all timings in nanoseconds */ | ||
ti,cs-min-turnaround-ns = <0>; | ||
ti,cs-read-hold-ns = <8>; | ||
ti,cs-read-strobe-ns = <40>; | ||
ti,cs-read-setup-ns = <14>; | ||
ti,cs-write-hold-ns = <7>; | ||
ti,cs-write-strobe-ns = <40>; | ||
ti,cs-write-setup-ns = <14>; | ||
ti,cs-bus-width = <16>; | ||
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flash@0,0x0000000 { | ||
compatible = "cfi-flash"; | ||
reg = <0 0x0000000 0x4000000>; | ||
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... | ||
}; | ||
}; | ||
}; |
4 changes: 2 additions & 2 deletions
4
Documentation/devicetree/bindings/misc/allwinner,sunxi-sid.txt
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