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sh/PCI: Pass GAPSPCI_DMA_BASE CPU & bus address to dma_declare_cohere…
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…nt_memory()

dma_declare_coherent_memory() needs both the CPU physical address and the
bus address of the device memory.  They are the same on this platform, but
in general we should use pcibios_resource_to_bus() to account for any
address translation done by the PCI host bridge.

This makes no difference on Dreamcast, but is safer if the usage is copied
to future drivers.

Signed-off-by: Bjorn Helgaas <[email protected]>
Acked-by: Arnd Bergmann <[email protected]>
CC: Magnus Damm <[email protected]>
CC: [email protected]
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bjorn-helgaas committed May 20, 2014
1 parent 88a984b commit ace4b3f
Showing 1 changed file with 15 additions and 3 deletions.
18 changes: 15 additions & 3 deletions arch/sh/drivers/pci/fixups-dreamcast.c
Original file line number Diff line number Diff line change
Expand Up @@ -31,6 +31,8 @@
static void gapspci_fixup_resources(struct pci_dev *dev)
{
struct pci_channel *p = dev->sysdata;
struct resource res;
struct pci_bus_region region;

printk(KERN_NOTICE "PCI: Fixing up device %s\n", pci_name(dev));

Expand All @@ -50,11 +52,21 @@ static void gapspci_fixup_resources(struct pci_dev *dev)

/*
* Redirect dma memory allocations to special memory window.
*
* If this GAPSPCI region were mapped by a BAR, the CPU
* phys_addr_t would be pci_resource_start(), and the bus
* address would be pci_bus_address(pci_resource_start()).
* But apparently there's no BAR mapping it, so we just
* "know" its CPU address is GAPSPCI_DMA_BASE.
*/
res.start = GAPSPCI_DMA_BASE;
res.end = GAPSPCI_DMA_BASE + GAPSPCI_DMA_SIZE - 1;
res.flags = IORESOURCE_MEM;
pcibios_resource_to_bus(dev->bus, &region, &res);
BUG_ON(!dma_declare_coherent_memory(&dev->dev,
GAPSPCI_DMA_BASE,
GAPSPCI_DMA_BASE,
GAPSPCI_DMA_SIZE,
res.start,
region.start,
resource_size(&res),
DMA_MEMORY_MAP |
DMA_MEMORY_EXCLUSIVE));
break;
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