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soc: ll and hal for sleep related code
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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD | ||
// | ||
// Licensed under the Apache License, Version 2.0 (the "License"); | ||
// you may not use this file except in compliance with the License. | ||
// You may obtain a copy of the License at | ||
// | ||
// http://www.apache.org/licenses/LICENSE-2.0 | ||
// | ||
// Unless required by applicable law or agreed to in writing, software | ||
// distributed under the License is distributed on an "AS IS" BASIS, | ||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
// See the License for the specific language governing permissions and | ||
// limitations under the License. | ||
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#pragma once | ||
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#include "hal/gpio_types.h" | ||
#include "hal/rtc_io_ll.h" | ||
#include "hal/rtc_cntl_ll.h" | ||
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#define rtc_hal_ext1_get_wakeup_pins() rtc_cntl_ll_ext1_get_wakeup_pins() | ||
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#define rtc_hal_ext1_set_wakeup_pins(mask, mode) rtc_cntl_ll_ext1_set_wakeup_pins(mask, mode) | ||
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#define rtc_hal_ext1_clear_wakeup_pins() rtc_cntl_ll_ext1_clear_wakeup_pins() | ||
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#define rtc_hal_set_wakeup_timer(ticks) rtc_cntl_ll_set_wakeup_timer(ticks) | ||
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/* | ||
* Enable wakeup from ULP coprocessor. | ||
*/ | ||
#define rtc_hal_ulp_wakeup_enable() rtc_cntl_ll_ulp_wakeup_enable() | ||
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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD | ||
// | ||
// Licensed under the Apache License, Version 2.0 (the "License"); | ||
// you may not use this file except in compliance with the License. | ||
// You may obtain a copy of the License at | ||
// | ||
// http://www.apache.org/licenses/LICENSE-2.0 | ||
// | ||
// Unless required by applicable law or agreed to in writing, software | ||
// distributed under the License is distributed on an "AS IS" BASIS, | ||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
// See the License for the specific language governing permissions and | ||
// limitations under the License. | ||
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#pragma once | ||
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#include "soc/soc.h" | ||
#include "soc/rtc.h" | ||
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#ifdef __cplusplus | ||
extern "C" { | ||
#endif | ||
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static inline void rtc_cntl_ll_set_wakeup_timer(uint64_t t) | ||
{ | ||
WRITE_PERI_REG(RTC_CNTL_SLP_TIMER0_REG, t & UINT32_MAX); | ||
WRITE_PERI_REG(RTC_CNTL_SLP_TIMER1_REG, t >> 32); | ||
} | ||
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static inline void rtc_cntl_ll_ext1_clear_wakeup_pins(void) | ||
{ | ||
REG_SET_BIT(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_STATUS_CLR); | ||
} | ||
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static inline uint32_t rtc_cntl_ll_ext1_get_wakeup_pins(void) | ||
{ | ||
return REG_GET_FIELD(RTC_CNTL_EXT_WAKEUP1_STATUS_REG, RTC_CNTL_EXT_WAKEUP1_STATUS); | ||
} | ||
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static inline void rtc_cntl_ll_ext1_set_wakeup_pins(uint32_t mask, int mode) | ||
{ | ||
REG_SET_FIELD(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_SEL, mask); | ||
SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1, | ||
mode, RTC_CNTL_EXT_WAKEUP1_LV_S); | ||
} | ||
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static inline void rtc_cntl_ll_ulp_wakeup_enable(void) | ||
{ | ||
SET_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_WAKEUP_FORCE_EN); | ||
} | ||
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#ifdef __cplusplus | ||
} | ||
#endif |
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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD | ||
// | ||
// Licensed under the Apache License, Version 2.0 (the "License"); | ||
// you may not use this file except in compliance with the License. | ||
// You may obtain a copy of the License at | ||
// | ||
// http://www.apache.org/licenses/LICENSE-2.0 | ||
// | ||
// Unless required by applicable law or agreed to in writing, software | ||
// distributed under the License is distributed on an "AS IS" BASIS, | ||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
// See the License for the specific language governing permissions and | ||
// limitations under the License. | ||
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#pragma once | ||
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#include "soc/soc.h" | ||
#include "soc/rtc.h" | ||
#include "soc/rtc_cntl_reg.h" | ||
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#ifdef __cplusplus | ||
extern "C" { | ||
#endif | ||
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static inline void rtc_cntl_ll_set_wakeup_timer(uint64_t t) | ||
{ | ||
WRITE_PERI_REG(RTC_CNTL_SLP_TIMER0_REG, t & UINT32_MAX); | ||
WRITE_PERI_REG(RTC_CNTL_SLP_TIMER1_REG, t >> 32); | ||
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SET_PERI_REG_MASK(RTC_CNTL_INT_CLR_REG, RTC_CNTL_MAIN_TIMER_INT_CLR_M); | ||
SET_PERI_REG_MASK(RTC_CNTL_SLP_TIMER1_REG, RTC_CNTL_MAIN_TIMER_ALARM_EN_M); | ||
} | ||
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static inline uint32_t rtc_cntl_ll_ext1_get_wakeup_pins(void) | ||
{ | ||
return REG_GET_FIELD(RTC_CNTL_EXT_WAKEUP1_STATUS_REG, RTC_CNTL_EXT_WAKEUP1_STATUS); | ||
} | ||
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static inline void rtc_cntl_ll_ext1_set_wakeup_pins(uint32_t mask, int mode) | ||
{ | ||
REG_SET_FIELD(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_SEL, mask); | ||
SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1, | ||
mode, RTC_CNTL_EXT_WAKEUP1_LV_S); | ||
} | ||
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static inline void rtc_cntl_ll_ext1_clear_wakeup_pins(void) | ||
{ | ||
REG_SET_BIT(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_STATUS_CLR); | ||
} | ||
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static inline void rtc_cntl_ll_ulp_wakeup_enable(void) | ||
{ | ||
SET_PERI_REG_BITS(RTC_CNTL_STATE0_REG, RTC_CNTL_WAKEUP_ENA_V, 0x800, RTC_CNTL_WAKEUP_ENA_S); | ||
} | ||
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#ifdef __cplusplus | ||
} | ||
#endif |
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Original file line number | Diff line number | Diff line change |
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// Copyright 2020 Espressif Systems (Shanghai) PTE LTD | ||
// | ||
// Licensed under the Apache License, Version 2.0 (the "License"); | ||
// you may not use this file except in compliance with the License. | ||
// You may obtain a copy of the License at | ||
// | ||
// http://www.apache.org/licenses/LICENSE-2.0 | ||
// | ||
// Unless required by applicable law or agreed to in writing, software | ||
// distributed under the License is distributed on an "AS IS" BASIS, | ||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
// See the License for the specific language governing permissions and | ||
// limitations under the License. | ||
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#pragma once | ||
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#include "soc/soc.h" | ||
#include "soc/rtc.h" | ||
#include "soc/rtc_cntl_reg.h" | ||
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#ifdef __cplusplus | ||
extern "C" { | ||
#endif | ||
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static inline void rtc_cntl_ll_set_wakeup_timer(uint64_t t) | ||
{ | ||
WRITE_PERI_REG(RTC_CNTL_SLP_TIMER0_REG, t & UINT32_MAX); | ||
WRITE_PERI_REG(RTC_CNTL_SLP_TIMER1_REG, t >> 32); | ||
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SET_PERI_REG_MASK(RTC_CNTL_INT_CLR_REG, RTC_CNTL_MAIN_TIMER_INT_CLR_M); | ||
SET_PERI_REG_MASK(RTC_CNTL_SLP_TIMER1_REG, RTC_CNTL_MAIN_TIMER_ALARM_EN_M); | ||
} | ||
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static inline uint32_t rtc_cntl_ll_ext1_get_wakeup_pins(void) | ||
{ | ||
return REG_GET_FIELD(RTC_CNTL_EXT_WAKEUP1_STATUS_REG, RTC_CNTL_EXT_WAKEUP1_STATUS); | ||
} | ||
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static inline void rtc_cntl_ll_ext1_set_wakeup_pins(uint32_t mask, int mode) | ||
{ | ||
REG_SET_FIELD(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_SEL, mask); | ||
SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1, | ||
mode, RTC_CNTL_EXT_WAKEUP1_LV_S); | ||
} | ||
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static inline void rtc_cntl_ll_ext1_clear_wakeup_pins(void) | ||
{ | ||
REG_SET_BIT(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_STATUS_CLR); | ||
} | ||
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static inline void rtc_cntl_ll_ulp_wakeup_enable(void) | ||
{ | ||
SET_PERI_REG_BITS(RTC_CNTL_STATE0_REG, RTC_CNTL_WAKEUP_ENA_V, 0x800, RTC_CNTL_WAKEUP_ENA_S); | ||
} | ||
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#ifdef __cplusplus | ||
} | ||
#endif |
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