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Merge tag 'ixp4xx-arm-soc-v5.14' of git://git.kernel.org/pub/scm/linu…
…x/kernel/git/linusw/linux-nomadik into arm/soc This is a major chunk of IXP4xx modernization: - Fist we move some registers around to make room for the predetermined PCI I/O space. - Then we add some Kconfig options to make it possible to use the old PCI driver in parallell with the new shiny one. - Then we add the new PCI driver and some bindings for it. - On top of this we add an (ages old) patch from Arnd that centralize the CPU/SoC detection in drivers/soc and make the header a standard Linux header to avoid the <mach/*> business in drivers. - Then we split out and modernize some platform data headers for pata, and hwrandom, and top it up with DT bindings and support for hwrandom. * tag 'ixp4xx-arm-soc-v5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ixp4xx: fix spelling mistake in Kconfig "Devce" -> "Device" hw_random: ixp4xx: Add OF support hw_random: ixp4xx: Add DT bindings hw_random: ixp4xx: Turn into a module hw_random: ixp4xx: Use SPDX license tag hw_random: ixp4xx: enable compile-testing pata: ixp4xx: split platform data to its own header soc: ixp4xx: move cpu detection to linux/soc/ixp4xx/cpu.h PCI: ixp4xx: Add a new driver for IXP4xx PCI: ixp4xx: Add device tree bindings for IXP4xx ARM/ixp4xx: Make NEED_MACH_IO_H optional ARM/ixp4xx: Move the virtual IObases Link: https://lore.kernel.org/r/CACRpkdbw6HSpp7k6q1FYGmtafLmdAu8bFnpHQOdfBDYYsdLbkw@mail.gmail.com Signed-off-by: Olof Johansson <[email protected]>
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Documentation/devicetree/bindings/pci/intel,ixp4xx-pci.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/pci/intel,ixp4xx-pci.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: Intel IXP4xx PCI controller | ||
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maintainers: | ||
- Linus Walleij <[email protected]> | ||
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description: PCI host controller found in the Intel IXP4xx SoC series. | ||
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allOf: | ||
- $ref: /schemas/pci/pci-bus.yaml# | ||
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properties: | ||
compatible: | ||
items: | ||
- enum: | ||
- intel,ixp42x-pci | ||
- intel,ixp43x-pci | ||
description: The two supported variants are ixp42x and ixp43x, | ||
though more variants may exist. | ||
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reg: | ||
items: | ||
- description: IXP4xx-specific registers | ||
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interrupts: | ||
items: | ||
- description: Main PCI interrupt | ||
- description: PCI DMA interrupt 1 | ||
- description: PCI DMA interrupt 2 | ||
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ranges: | ||
maxItems: 2 | ||
description: Typically one memory range of 64MB and one IO | ||
space range of 64KB. | ||
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dma-ranges: | ||
maxItems: 1 | ||
description: The DMA range tells the PCI host which addresses | ||
the RAM is at. It can map only 64MB so if the RAM is bigger | ||
than 64MB the DMA access has to be restricted to these | ||
addresses. | ||
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"#interrupt-cells": true | ||
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interrupt-map: true | ||
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interrupt-map-mask: | ||
items: | ||
- const: 0xf800 | ||
- const: 0 | ||
- const: 0 | ||
- const: 7 | ||
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required: | ||
- compatible | ||
- reg | ||
- dma-ranges | ||
- "#interrupt-cells" | ||
- interrupt-map | ||
- interrupt-map-mask | ||
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unevaluatedProperties: false | ||
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examples: | ||
- | | ||
pci@c0000000 { | ||
compatible = "intel,ixp43x-pci"; | ||
reg = <0xc0000000 0x1000>; | ||
#address-cells = <3>; | ||
#size-cells = <2>; | ||
device_type = "pci"; | ||
bus-range = <0x00 0xff>; | ||
ranges = | ||
<0x02000000 0 0x48000000 0x48000000 0 0x04000000>, | ||
<0x01000000 0 0x00000000 0x4c000000 0 0x00010000>; | ||
dma-ranges = | ||
<0x02000000 0 0x00000000 0x00000000 0 0x04000000>; | ||
#interrupt-cells = <1>; | ||
interrupt-map-mask = <0xf800 0 0 7>; | ||
interrupt-map = | ||
<0x0800 0 0 1 &gpio0 11 3>, /* INT A on slot 1 is irq 11 */ | ||
<0x0800 0 0 2 &gpio0 10 3>, /* INT B on slot 1 is irq 10 */ | ||
<0x0800 0 0 3 &gpio0 9 3>, /* INT C on slot 1 is irq 9 */ | ||
<0x0800 0 0 4 &gpio0 8 3>, /* INT D on slot 1 is irq 8 */ | ||
<0x1000 0 0 1 &gpio0 10 3>, /* INT A on slot 2 is irq 10 */ | ||
<0x1000 0 0 2 &gpio0 9 3>, /* INT B on slot 2 is irq 9 */ | ||
<0x1000 0 0 3 &gpio0 8 3>, /* INT C on slot 2 is irq 8 */ | ||
<0x1000 0 0 4 &gpio0 11 3>, /* INT D on slot 2 is irq 11 */ | ||
<0x1800 0 0 1 &gpio0 9 3>, /* INT A on slot 3 is irq 9 */ | ||
<0x1800 0 0 2 &gpio0 8 3>, /* INT B on slot 3 is irq 8 */ | ||
<0x1800 0 0 3 &gpio0 11 3>, /* INT C on slot 3 is irq 11 */ | ||
<0x1800 0 0 4 &gpio0 10 3>; /* INT D on slot 3 is irq 10 */ | ||
}; |
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Documentation/devicetree/bindings/rng/intel,ixp46x-rng.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
%YAML 1.2 | ||
--- | ||
$id: http://devicetree.org/schemas/rng/intel,ixp46x-rng.yaml# | ||
$schema: http://devicetree.org/meta-schemas/core.yaml# | ||
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title: Intel IXP46x RNG bindings | ||
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description: | | ||
The Intel IXP46x has a random number generator at a fixed physical | ||
location in memory. Each read is guaranteed to provide a unique | ||
32 bit random number. | ||
maintainers: | ||
- Linus Walleij <[email protected]> | ||
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properties: | ||
compatible: | ||
const: intel,ixp46x-rng | ||
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reg: | ||
maxItems: 1 | ||
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required: | ||
- compatible | ||
- reg | ||
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additionalProperties: false | ||
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examples: | ||
- | | ||
rng@70002100 { | ||
compatible = "intel,ixp46x-rng"; | ||
reg = <0x70002100 4>; | ||
}; | ||
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@@ -9252,6 +9252,7 @@ F: include/linux/soc/ixp4xx/qmgr.h | |
INTEL IXP4XX RANDOM NUMBER GENERATOR SUPPORT | ||
M: Deepak Saxena <[email protected]> | ||
S: Maintained | ||
F: Documentation/devicetree/bindings/display/intel,ixp46x-rng.yaml | ||
F: drivers/char/hw_random/ixp4xx-rng.c | ||
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INTEL KEEM BAY DRM DRIVER | ||
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@@ -14015,6 +14016,12 @@ S: Maintained | |
F: Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml | ||
F: drivers/pci/controller/dwc/pcie-fu740.c | ||
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PCI DRIVER FOR INTEL IXP4XX | ||
M: Linus Walleij <[email protected]> | ||
S: Maintained | ||
F: Documentation/devicetree/bindings/pci/intel,ixp4xx-pci.yaml | ||
F: drivers/pci/controller/pci-ixp4xx.c | ||
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PCI DRIVER FOR INTEL VOLUME MANAGEMENT DEVICE (VMD) | ||
M: Jonathan Derrick <[email protected]> | ||
L: [email protected] | ||
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