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MIPS: Loongson2: Fix typo "enalbe" -> "enable"
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Signed-off-by: Uwe Kleine-König <[email protected]>
Cc: Yanhua <[email protected]>
Cc: Robert Richter <[email protected]>
Acked-by: Wu Zhangjin <[email protected]>
Signed-off-by: Ralf Baechle <[email protected]>
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Uwe Kleine-König authored and ralfbaechle committed Sep 30, 2009
1 parent b265158 commit 8813d33
Showing 1 changed file with 7 additions and 7 deletions.
14 changes: 7 additions & 7 deletions arch/mips/oprofile/op_model_loongson2.c
Original file line number Diff line number Diff line change
Expand Up @@ -44,7 +44,7 @@ static struct loongson2_register_config {
unsigned int ctrl;
unsigned long long reset_counter1;
unsigned long long reset_counter2;
int cnt1_enalbed, cnt2_enalbed;
int cnt1_enabled, cnt2_enabled;
} reg;

DEFINE_SPINLOCK(sample_lock);
Expand Down Expand Up @@ -81,8 +81,8 @@ static void loongson2_reg_setup(struct op_counter_config *cfg)

reg.ctrl = ctrl;

reg.cnt1_enalbed = cfg[0].enabled;
reg.cnt2_enalbed = cfg[1].enabled;
reg.cnt1_enabled = cfg[0].enabled;
reg.cnt2_enabled = cfg[1].enabled;

}

Expand All @@ -99,7 +99,7 @@ static void loongson2_cpu_setup(void *args)
static void loongson2_cpu_start(void *args)
{
/* Start all counters on current CPU */
if (reg.cnt1_enalbed || reg.cnt2_enalbed)
if (reg.cnt1_enabled || reg.cnt2_enabled)
write_c0_perfctrl(reg.ctrl);
}

Expand All @@ -125,7 +125,7 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
*/

/* Check whether the irq belongs to me */
enabled = reg.cnt1_enalbed | reg.cnt2_enalbed;
enabled = reg.cnt1_enabled | reg.cnt2_enabled;
if (!enabled)
return IRQ_NONE;

Expand All @@ -136,12 +136,12 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id)
spin_lock_irqsave(&sample_lock, flags);

if (counter1 & LOONGSON2_PERFCNT_OVERFLOW) {
if (reg.cnt1_enalbed)
if (reg.cnt1_enabled)
oprofile_add_sample(regs, 0);
counter1 = reg.reset_counter1;
}
if (counter2 & LOONGSON2_PERFCNT_OVERFLOW) {
if (reg.cnt2_enalbed)
if (reg.cnt2_enabled)
oprofile_add_sample(regs, 1);
counter2 = reg.reset_counter2;
}
Expand Down

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