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Merge tag 'clk-for-linus-3.16-part2' of git://git.linaro.org/people/m…
…ike.turquette/linux Pull more clock framework updates from Mike Turquette: "This contains the second half the of the clk changes for 3.16. They are simply fixes and code refactoring for the OMAP clock drivers. The sunxi clock driver changes include splitting out the one mega-driver into several smaller pieces and adding support for the A31 SoC clocks" * tag 'clk-for-linus-3.16-part2' of git://git.linaro.org/people/mike.turquette/linux: (25 commits) clk: sunxi: document PRCM clock compatible strings clk: sunxi: add PRCM (Power/Reset/Clock Management) clks support clk: sun6i: Protect SDRAM gating bit clk: sun6i: Protect CPU clock clk: sunxi: Rework clock protection code clk: sunxi: Move the GMAC clock to a file of its own clk: sunxi: Move the 24M oscillator to a file of its own clk: sunxi: Remove calls to clk_put clk: sunxi: document new A31 USB clock compatible clk: sunxi: Implement A31 USB clock ARM: dts: OMAP5/DRA7: use omap5-mpu-dpll-clock capable of dealing with higher frequencies CLK: TI: dpll: support OMAP5 MPU DPLL that need special handling for higher frequencies ARM: OMAP5+: dpll: support Duty Cycle Correction(DCC) CLK: TI: clk-54xx: Set the rate for dpll_abe_m2x2_ck CLK: TI: Driver for DRA7 ATL (Audio Tracking Logic) dt:/bindings: DRA7 ATL (Audio Tracking Logic) clock bindings ARM: dts: dra7xx-clocks: Correct name for atl clkin3 clock CLK: TI: gate: add composite interface clock to OMAP2 only build ARM: OMAP2: clock: add DT boot support for cpufreq_ck CLK: TI: OMAP2: add clock init support ...
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Device Tree Clock bindings for ATL (Audio Tracking Logic) of DRA7 SoC. | ||
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The ATL IP is used to generate clock to be used to synchronize baseband and | ||
audio codec. A single ATL IP provides four ATL clock instances sharing the same | ||
functional clock but can be configured to provide different clocks. | ||
ATL can maintain a clock averages to some desired frequency based on the bws/aws | ||
signals - can compensate the drift between the two ws signal. | ||
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In order to provide the support for ATL and it's output clocks (which can be used | ||
internally within the SoC or external components) two sets of bindings is needed: | ||
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Clock tree binding: | ||
This binding uses the common clock binding[1]. | ||
To be able to integrate the ATL clocks with DT clock tree. | ||
Provides ccf level representation of the ATL clocks to be used by drivers. | ||
Since the clock instances are part of a single IP this binding is used as a node | ||
for the DT clock tree, the IP driver is needed to handle the actual configuration | ||
of the IP. | ||
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[1] Documentation/devicetree/bindings/clock/clock-bindings.txt | ||
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Required properties: | ||
- compatible : shall be "ti,dra7-atl-clock" | ||
- #clock-cells : from common clock binding; shall be set to 0. | ||
- clocks : link phandles to functional clock of ATL | ||
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Binding for the IP driver: | ||
This binding is used to configure the IP driver which is going to handle the | ||
configuration of the IP for the ATL clock instances. | ||
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Required properties: | ||
- compatible : shall be "ti,dra7-atl" | ||
- reg : base address for the ATL IP | ||
- ti,provided-clocks : List of phandles to the clocks associated with the ATL | ||
- clocks : link phandles to functional clock of ATL | ||
- clock-names : Shall be set to "fck" | ||
- ti,hwmods : Shall be set to "atl" | ||
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Optional properties: | ||
Configuration of ATL instances: | ||
- atl{0/1/2/3} { | ||
- bws : Baseband word select signal selection | ||
- aws : Audio word select signal selection | ||
}; | ||
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For valid word select signals, see the dt-bindings/clk/ti-dra7-atl.h include | ||
file. | ||
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Examples: | ||
/* clock bindings for atl provided clocks */ | ||
atl_clkin0_ck: atl_clkin0_ck { | ||
#clock-cells = <0>; | ||
compatible = "ti,dra7-atl-clock"; | ||
clocks = <&atl_gfclk_mux>; | ||
}; | ||
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atl_clkin1_ck: atl_clkin1_ck { | ||
#clock-cells = <0>; | ||
compatible = "ti,dra7-atl-clock"; | ||
clocks = <&atl_gfclk_mux>; | ||
}; | ||
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atl_clkin2_ck: atl_clkin2_ck { | ||
#clock-cells = <0>; | ||
compatible = "ti,dra7-atl-clock"; | ||
clocks = <&atl_gfclk_mux>; | ||
}; | ||
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atl_clkin3_ck: atl_clkin3_ck { | ||
#clock-cells = <0>; | ||
compatible = "ti,dra7-atl-clock"; | ||
clocks = <&atl_gfclk_mux>; | ||
}; | ||
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/* binding for the IP */ | ||
atl: atl@4843c000 { | ||
compatible = "ti,dra7-atl"; | ||
reg = <0x4843c000 0x3ff>; | ||
ti,hwmods = "atl"; | ||
ti,provided-clocks = <&atl_clkin0_ck>, <&atl_clkin1_ck>, | ||
<&atl_clkin2_ck>, <&atl_clkin3_ck>; | ||
clocks = <&atl_gfclk_mux>; | ||
clock-names = "fck"; | ||
status = "disabled"; | ||
}; | ||
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#include <dt-bindings/clk/ti-dra7-atl.h> | ||
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&atl { | ||
status = "okay"; | ||
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atl2 { | ||
bws = <DRA7_ATL_WS_MCASP2_FSX>; | ||
aws = <DRA7_ATL_WS_MCASP3_FSX>; | ||
}; | ||
}; |
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