[GlobalISel][X86] G_LOAD/G_STORE pointer selection support.

Summary: [GlobalISel][X86] G_LOAD/G_STORE pointer selection support.

Reviewers: zvi, guyblank

Reviewed By: zvi, guyblank

Subscribers: dberris, rovka, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D32217

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301788 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86InstructionSelector.cpp

@@ -400,15 +400,15 @@ unsigned X86InstructionSelector::getLoadStoreOp(LLT &Ty, const RegisterBank &RB,
   } else if (Ty == LLT::scalar(16)) {
     if (X86::GPRRegBankID == RB.getID())
       return Isload ? X86::MOV16rm : X86::MOV16mr;
-  } else if (Ty == LLT::scalar(32)) {
+  } else if (Ty == LLT::scalar(32) || Ty == LLT::pointer(0, 32)) {
     if (X86::GPRRegBankID == RB.getID())
       return Isload ? X86::MOV32rm : X86::MOV32mr;
     if (X86::VECRRegBankID == RB.getID())
       return Isload ? (HasAVX512 ? X86::VMOVSSZrm
                                  : HasAVX ? X86::VMOVSSrm : X86::MOVSSrm)
                     : (HasAVX512 ? X86::VMOVSSZmr
                                  : HasAVX ? X86::VMOVSSmr : X86::MOVSSmr);
-  } else if (Ty == LLT::scalar(64)) {
+  } else if (Ty == LLT::scalar(64) || Ty == LLT::pointer(0, 64)) {
     if (X86::GPRRegBankID == RB.getID())
       return Isload ? X86::MOV64rm : X86::MOV64mr;
     if (X86::VECRRegBankID == RB.getID())

test/CodeGen/X86/GlobalISel/memop-x32.ll

@@ -0,0 +1,101 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=i386-linux-gnu                       -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE_FAST
+; RUN: llc -mtriple=i386-linux-gnu -regbankselect-greedy -global-isel < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE_GREEDY
+
+;TODO merge with x86-64 tests (many operations not suppored yet)
+
+define i8 @test_load_i8(i8 * %p1) {
+; ALL-LABEL: test_load_i8:
+; ALL:       # BB#0:
+; ALL-NEXT:    leal 4(%esp), %eax
+; ALL-NEXT:    movl (%eax), %eax
+; ALL-NEXT:    movb (%eax), %al
+; ALL-NEXT:    retl
+  %r = load i8, i8* %p1
+  ret i8 %r
+}
+
+define i16 @test_load_i16(i16 * %p1) {
+; ALL-LABEL: test_load_i16:
+; ALL:       # BB#0:
+; ALL-NEXT:    leal 4(%esp), %eax
+; ALL-NEXT:    movl (%eax), %eax
+; ALL-NEXT:    movzwl (%eax), %eax
+; ALL-NEXT:    retl
+  %r = load i16, i16* %p1
+  ret i16 %r
+}
+
+define i32 @test_load_i32(i32 * %p1) {
+; ALL-LABEL: test_load_i32:
+; ALL:       # BB#0:
+; ALL-NEXT:    leal 4(%esp), %eax
+; ALL-NEXT:    movl (%eax), %eax
+; ALL-NEXT:    movl (%eax), %eax
+; ALL-NEXT:    retl
+  %r = load i32, i32* %p1
+  ret i32 %r
+}
+
+define i8 * @test_store_i8(i8 %val, i8 * %p1) {
+; ALL-LABEL: test_store_i8:
+; ALL:       # BB#0:
+; ALL-NEXT:    leal 4(%esp), %eax
+; ALL-NEXT:    movb (%eax), %cl
+; ALL-NEXT:    leal 8(%esp), %eax
+; ALL-NEXT:    movl (%eax), %eax
+; ALL-NEXT:    movb %cl, (%eax)
+; ALL-NEXT:    retl
+  store i8 %val, i8* %p1
+  ret i8 * %p1;
+}
+
+define i16 * @test_store_i16(i16 %val, i16 * %p1) {
+; ALL-LABEL: test_store_i16:
+; ALL:       # BB#0:
+; ALL-NEXT:    leal 4(%esp), %eax
+; ALL-NEXT:    movzwl (%eax), %ecx
+; ALL-NEXT:    leal 8(%esp), %eax
+; ALL-NEXT:    movl (%eax), %eax
+; ALL-NEXT:    movw %cx, (%eax)
+; ALL-NEXT:    retl
+  store i16 %val, i16* %p1
+  ret i16 * %p1;
+}
+
+define i32 * @test_store_i32(i32 %val, i32 * %p1) {
+; ALL-LABEL: test_store_i32:
+; ALL:       # BB#0:
+; ALL-NEXT:    leal 4(%esp), %eax
+; ALL-NEXT:    movl (%eax), %ecx
+; ALL-NEXT:    leal 8(%esp), %eax
+; ALL-NEXT:    movl (%eax), %eax
+; ALL-NEXT:    movl %ecx, (%eax)
+; ALL-NEXT:    retl
+  store i32 %val, i32* %p1
+  ret i32 * %p1;
+}
+
+define i32* @test_load_ptr(i32** %ptr1) {
+; ALL-LABEL: test_load_ptr:
+; ALL:       # BB#0:
+; ALL-NEXT:    leal 4(%esp), %eax
+; ALL-NEXT:    movl (%eax), %eax
+; ALL-NEXT:    movl (%eax), %eax
+; ALL-NEXT:    retl
+  %p = load i32*, i32** %ptr1
+  ret i32* %p
+}
+
+define void @test_store_ptr(i32** %ptr1, i32* %a) {
+; ALL-LABEL: test_store_ptr:
+; ALL:       # BB#0:
+; ALL-NEXT:    leal 4(%esp), %eax
+; ALL-NEXT:    movl (%eax), %eax
+; ALL-NEXT:    leal 8(%esp), %ecx
+; ALL-NEXT:    movl (%ecx), %ecx
+; ALL-NEXT:    movl %ecx, (%eax)
+; ALL-NEXT:    retl
+  store i32* %a, i32** %ptr1
+  ret void
+}

test/CodeGen/X86/GlobalISel/memop.ll

@@ -187,3 +187,20 @@ define double * @test_store_double(double %val, double * %p1) {
   ret double * %p1;
 }
 
+define i32* @test_load_ptr(i32** %ptr1) {
+; ALL-LABEL: test_load_ptr:
+; ALL:       # BB#0:
+; ALL-NEXT:    movq (%rdi), %rax
+; ALL-NEXT:    retq
+  %p = load i32*, i32** %ptr1
+  ret i32* %p
+}
+
+define void @test_store_ptr(i32** %ptr1, i32* %a) {
+; ALL-LABEL: test_store_ptr:
+; ALL:       # BB#0:
+; ALL-NEXT:    movq %rsi, (%rdi)
+; ALL-NEXT:    retq
+  store i32* %a, i32** %ptr1
+  ret void
+}