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[mips] In the integrated assembler, select the default feature bits b…
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…y changing the CPU value.

    
This is consistent with the way CodeGen acheives this. However, CodeGen
always selects mips32 (even when the architecture is mips64).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201694 91177308-0d34-0410-b5e6-96231b3b80d8
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dsandersllvm committed Feb 19, 2014
1 parent f47b32e commit ffac49b
Showing 1 changed file with 8 additions and 27 deletions.
35 changes: 8 additions & 27 deletions lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -39,27 +39,6 @@

using namespace llvm;

static std::string ParseMipsTriple(StringRef TT, StringRef CPU) {
std::string MipsArchFeature;
Triple TheTriple(TT);

if (TheTriple.getArch() == Triple::mips ||
TheTriple.getArch() == Triple::mipsel) {
if (CPU.empty() || CPU == "mips32") {
MipsArchFeature = "+mips32";
} else if (CPU == "mips32r2") {
MipsArchFeature = "+mips32r2";
}
} else {
if (CPU.empty() || CPU == "mips64") {
MipsArchFeature = "+mips64";
} else if (CPU == "mips64r2") {
MipsArchFeature = "+mips64r2";
}
}
return MipsArchFeature;
}

static MCInstrInfo *createMipsMCInstrInfo() {
MCInstrInfo *X = new MCInstrInfo();
InitMipsMCInstrInfo(X);
Expand All @@ -74,15 +53,17 @@ static MCRegisterInfo *createMipsMCRegisterInfo(StringRef TT) {

static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU,
StringRef FS) {
std::string ArchFS = ParseMipsTriple(TT,CPU);
if (!FS.empty()) {
if (!ArchFS.empty())
ArchFS = ArchFS + "," + FS.str();
if (CPU.empty()) {
Triple TheTriple(TT);
// FIXME: CodeGen picks mips32 in both cases.
if (TheTriple.getArch() == Triple::mips ||
TheTriple.getArch() == Triple::mipsel)
CPU = "mips32";
else
ArchFS = FS;
CPU = "mips64";
}
MCSubtargetInfo *X = new MCSubtargetInfo();
InitMipsMCSubtargetInfo(X, TT, CPU, ArchFS);
InitMipsMCSubtargetInfo(X, TT, CPU, FS);
return X;
}

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