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This adds support for W5500 chip. W5500 has similar register and memory organization with W5100 and W5200. There are a few important differences listed below but it is still possible to share common code with W5100 and W5200. * W5500 register and memory are organized by multiple blocks. Each one is selected by 16bits offset address and 5bits block select bits. But the existing register access operations take u16 address. This change extends the addess by u32 address and put offset address to lower 16bits and block select bits to upper 16bits. This change also adds the offset addresses for socket register and TX/RX memory blocks to the driver private data structure in order to reduce conditional switches for each chip. * W5500 has the different register offset for socket interrupt mask register. Newly added internal functions w5100_enable_intr() and w5100_disable_intr() take care of the diffrence. * W5500 has the different register offset for retry time-value register. But this register is only used to verify that the reset value is correctly read at initialization. So move the verification to w5100_hw_reset() which already does different things for different chips. Signed-off-by: Akinobu Mita <[email protected]> Cc: Mike Sinkovsky <[email protected]> Cc: David S. Miller <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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Original file line number | Diff line number | Diff line change |
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@@ -1,5 +1,5 @@ | ||
/* | ||
* Ethernet driver for the WIZnet W5100/W5200 chip. | ||
* Ethernet driver for the WIZnet W5100/W5200/W5500 chip. | ||
* | ||
* Copyright (C) 2016 Akinobu Mita <[email protected]> | ||
* | ||
|
@@ -8,6 +8,7 @@ | |
* Datasheet: | ||
* http://www.wiznet.co.kr/wp-content/uploads/wiznethome/Chip/W5100/Document/W5100_Datasheet_v1.2.6.pdf | ||
* http://wiznethome.cafe24.com/wp-content/uploads/wiznethome/Chip/W5200/Documents/W5200_DS_V140E.pdf | ||
* http://wizwiki.net/wiki/lib/exe/fetch.php?media=products:w5500:w5500_ds_v106e_141230.pdf | ||
*/ | ||
|
||
#include <linux/kernel.h> | ||
|
@@ -21,7 +22,7 @@ | |
#define W5100_SPI_WRITE_OPCODE 0xf0 | ||
#define W5100_SPI_READ_OPCODE 0x0f | ||
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||
static int w5100_spi_read(struct net_device *ndev, u16 addr) | ||
static int w5100_spi_read(struct net_device *ndev, u32 addr) | ||
{ | ||
struct spi_device *spi = to_spi_device(ndev->dev.parent); | ||
u8 cmd[3] = { W5100_SPI_READ_OPCODE, addr >> 8, addr & 0xff }; | ||
|
@@ -33,15 +34,15 @@ static int w5100_spi_read(struct net_device *ndev, u16 addr) | |
return ret ? ret : data; | ||
} | ||
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||
static int w5100_spi_write(struct net_device *ndev, u16 addr, u8 data) | ||
static int w5100_spi_write(struct net_device *ndev, u32 addr, u8 data) | ||
{ | ||
struct spi_device *spi = to_spi_device(ndev->dev.parent); | ||
u8 cmd[4] = { W5100_SPI_WRITE_OPCODE, addr >> 8, addr & 0xff, data}; | ||
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return spi_write_then_read(spi, cmd, sizeof(cmd), NULL, 0); | ||
} | ||
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static int w5100_spi_read16(struct net_device *ndev, u16 addr) | ||
static int w5100_spi_read16(struct net_device *ndev, u32 addr) | ||
{ | ||
u16 data; | ||
int ret; | ||
|
@@ -55,7 +56,7 @@ static int w5100_spi_read16(struct net_device *ndev, u16 addr) | |
return ret < 0 ? ret : data | ret; | ||
} | ||
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||
static int w5100_spi_write16(struct net_device *ndev, u16 addr, u16 data) | ||
static int w5100_spi_write16(struct net_device *ndev, u32 addr, u16 data) | ||
{ | ||
int ret; | ||
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||
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@@ -66,7 +67,7 @@ static int w5100_spi_write16(struct net_device *ndev, u16 addr, u16 data) | |
return w5100_spi_write(ndev, addr + 1, data & 0xff); | ||
} | ||
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||
static int w5100_spi_readbulk(struct net_device *ndev, u16 addr, u8 *buf, | ||
static int w5100_spi_readbulk(struct net_device *ndev, u32 addr, u8 *buf, | ||
int len) | ||
{ | ||
int i; | ||
|
@@ -82,7 +83,7 @@ static int w5100_spi_readbulk(struct net_device *ndev, u16 addr, u8 *buf, | |
return 0; | ||
} | ||
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||
static int w5100_spi_writebulk(struct net_device *ndev, u16 addr, const u8 *buf, | ||
static int w5100_spi_writebulk(struct net_device *ndev, u32 addr, const u8 *buf, | ||
int len) | ||
{ | ||
int i; | ||
|
@@ -134,7 +135,7 @@ static int w5200_spi_init(struct net_device *ndev) | |
return 0; | ||
} | ||
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||
static int w5200_spi_read(struct net_device *ndev, u16 addr) | ||
static int w5200_spi_read(struct net_device *ndev, u32 addr) | ||
{ | ||
struct spi_device *spi = to_spi_device(ndev->dev.parent); | ||
u8 cmd[4] = { addr >> 8, addr & 0xff, 0, 1 }; | ||
|
@@ -146,15 +147,15 @@ static int w5200_spi_read(struct net_device *ndev, u16 addr) | |
return ret ? ret : data; | ||
} | ||
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||
static int w5200_spi_write(struct net_device *ndev, u16 addr, u8 data) | ||
static int w5200_spi_write(struct net_device *ndev, u32 addr, u8 data) | ||
{ | ||
struct spi_device *spi = to_spi_device(ndev->dev.parent); | ||
u8 cmd[5] = { addr >> 8, addr & 0xff, W5200_SPI_WRITE_OPCODE, 1, data }; | ||
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return spi_write_then_read(spi, cmd, sizeof(cmd), NULL, 0); | ||
} | ||
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static int w5200_spi_read16(struct net_device *ndev, u16 addr) | ||
static int w5200_spi_read16(struct net_device *ndev, u32 addr) | ||
{ | ||
struct spi_device *spi = to_spi_device(ndev->dev.parent); | ||
u8 cmd[4] = { addr >> 8, addr & 0xff, 0, 2 }; | ||
|
@@ -166,7 +167,7 @@ static int w5200_spi_read16(struct net_device *ndev, u16 addr) | |
return ret ? ret : be16_to_cpu(data); | ||
} | ||
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static int w5200_spi_write16(struct net_device *ndev, u16 addr, u16 data) | ||
static int w5200_spi_write16(struct net_device *ndev, u32 addr, u16 data) | ||
{ | ||
struct spi_device *spi = to_spi_device(ndev->dev.parent); | ||
u8 cmd[6] = { | ||
|
@@ -178,7 +179,7 @@ static int w5200_spi_write16(struct net_device *ndev, u16 addr, u16 data) | |
return spi_write_then_read(spi, cmd, sizeof(cmd), NULL, 0); | ||
} | ||
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static int w5200_spi_readbulk(struct net_device *ndev, u16 addr, u8 *buf, | ||
static int w5200_spi_readbulk(struct net_device *ndev, u32 addr, u8 *buf, | ||
int len) | ||
{ | ||
struct spi_device *spi = to_spi_device(ndev->dev.parent); | ||
|
@@ -208,7 +209,7 @@ static int w5200_spi_readbulk(struct net_device *ndev, u16 addr, u8 *buf, | |
return ret; | ||
} | ||
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static int w5200_spi_writebulk(struct net_device *ndev, u16 addr, const u8 *buf, | ||
static int w5200_spi_writebulk(struct net_device *ndev, u32 addr, const u8 *buf, | ||
int len) | ||
{ | ||
struct spi_device *spi = to_spi_device(ndev->dev.parent); | ||
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@@ -250,6 +251,164 @@ static const struct w5100_ops w5200_ops = { | |
.init = w5200_spi_init, | ||
}; | ||
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#define W5500_SPI_BLOCK_SELECT(addr) (((addr) >> 16) & 0x1f) | ||
#define W5500_SPI_READ_CONTROL(addr) (W5500_SPI_BLOCK_SELECT(addr) << 3) | ||
#define W5500_SPI_WRITE_CONTROL(addr) \ | ||
((W5500_SPI_BLOCK_SELECT(addr) << 3) | BIT(2)) | ||
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struct w5500_spi_priv { | ||
/* Serialize access to cmd_buf */ | ||
struct mutex cmd_lock; | ||
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/* DMA (thus cache coherency maintenance) requires the | ||
* transfer buffers to live in their own cache lines. | ||
*/ | ||
u8 cmd_buf[3] ____cacheline_aligned; | ||
}; | ||
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static struct w5500_spi_priv *w5500_spi_priv(struct net_device *ndev) | ||
{ | ||
return w5100_ops_priv(ndev); | ||
} | ||
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static int w5500_spi_init(struct net_device *ndev) | ||
{ | ||
struct w5500_spi_priv *spi_priv = w5500_spi_priv(ndev); | ||
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mutex_init(&spi_priv->cmd_lock); | ||
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return 0; | ||
} | ||
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static int w5500_spi_read(struct net_device *ndev, u32 addr) | ||
{ | ||
struct spi_device *spi = to_spi_device(ndev->dev.parent); | ||
u8 cmd[3] = { | ||
addr >> 8, | ||
addr, | ||
W5500_SPI_READ_CONTROL(addr) | ||
}; | ||
u8 data; | ||
int ret; | ||
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ret = spi_write_then_read(spi, cmd, sizeof(cmd), &data, 1); | ||
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return ret ? ret : data; | ||
} | ||
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static int w5500_spi_write(struct net_device *ndev, u32 addr, u8 data) | ||
{ | ||
struct spi_device *spi = to_spi_device(ndev->dev.parent); | ||
u8 cmd[4] = { | ||
addr >> 8, | ||
addr, | ||
W5500_SPI_WRITE_CONTROL(addr), | ||
data | ||
}; | ||
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return spi_write_then_read(spi, cmd, sizeof(cmd), NULL, 0); | ||
} | ||
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static int w5500_spi_read16(struct net_device *ndev, u32 addr) | ||
{ | ||
struct spi_device *spi = to_spi_device(ndev->dev.parent); | ||
u8 cmd[3] = { | ||
addr >> 8, | ||
addr, | ||
W5500_SPI_READ_CONTROL(addr) | ||
}; | ||
__be16 data; | ||
int ret; | ||
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ret = spi_write_then_read(spi, cmd, sizeof(cmd), &data, sizeof(data)); | ||
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return ret ? ret : be16_to_cpu(data); | ||
} | ||
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static int w5500_spi_write16(struct net_device *ndev, u32 addr, u16 data) | ||
{ | ||
struct spi_device *spi = to_spi_device(ndev->dev.parent); | ||
u8 cmd[5] = { | ||
addr >> 8, | ||
addr, | ||
W5500_SPI_WRITE_CONTROL(addr), | ||
data >> 8, | ||
data | ||
}; | ||
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return spi_write_then_read(spi, cmd, sizeof(cmd), NULL, 0); | ||
} | ||
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static int w5500_spi_readbulk(struct net_device *ndev, u32 addr, u8 *buf, | ||
int len) | ||
{ | ||
struct spi_device *spi = to_spi_device(ndev->dev.parent); | ||
struct w5500_spi_priv *spi_priv = w5500_spi_priv(ndev); | ||
struct spi_transfer xfer[] = { | ||
{ | ||
.tx_buf = spi_priv->cmd_buf, | ||
.len = sizeof(spi_priv->cmd_buf), | ||
}, | ||
{ | ||
.rx_buf = buf, | ||
.len = len, | ||
}, | ||
}; | ||
int ret; | ||
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mutex_lock(&spi_priv->cmd_lock); | ||
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spi_priv->cmd_buf[0] = addr >> 8; | ||
spi_priv->cmd_buf[1] = addr; | ||
spi_priv->cmd_buf[2] = W5500_SPI_READ_CONTROL(addr); | ||
ret = spi_sync_transfer(spi, xfer, ARRAY_SIZE(xfer)); | ||
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mutex_unlock(&spi_priv->cmd_lock); | ||
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return ret; | ||
} | ||
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static int w5500_spi_writebulk(struct net_device *ndev, u32 addr, const u8 *buf, | ||
int len) | ||
{ | ||
struct spi_device *spi = to_spi_device(ndev->dev.parent); | ||
struct w5500_spi_priv *spi_priv = w5500_spi_priv(ndev); | ||
struct spi_transfer xfer[] = { | ||
{ | ||
.tx_buf = spi_priv->cmd_buf, | ||
.len = sizeof(spi_priv->cmd_buf), | ||
}, | ||
{ | ||
.tx_buf = buf, | ||
.len = len, | ||
}, | ||
}; | ||
int ret; | ||
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mutex_lock(&spi_priv->cmd_lock); | ||
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spi_priv->cmd_buf[0] = addr >> 8; | ||
spi_priv->cmd_buf[1] = addr; | ||
spi_priv->cmd_buf[2] = W5500_SPI_WRITE_CONTROL(addr); | ||
ret = spi_sync_transfer(spi, xfer, ARRAY_SIZE(xfer)); | ||
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mutex_unlock(&spi_priv->cmd_lock); | ||
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return ret; | ||
} | ||
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static const struct w5100_ops w5500_ops = { | ||
.may_sleep = true, | ||
.chip_id = W5500, | ||
.read = w5500_spi_read, | ||
.write = w5500_spi_write, | ||
.read16 = w5500_spi_read16, | ||
.write16 = w5500_spi_write16, | ||
.readbulk = w5500_spi_readbulk, | ||
.writebulk = w5500_spi_writebulk, | ||
.init = w5500_spi_init, | ||
}; | ||
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static int w5100_spi_probe(struct spi_device *spi) | ||
{ | ||
const struct spi_device_id *id = spi_get_device_id(spi); | ||
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@@ -265,6 +424,10 @@ static int w5100_spi_probe(struct spi_device *spi) | |
ops = &w5200_ops; | ||
priv_size = sizeof(struct w5200_spi_priv); | ||
break; | ||
case W5500: | ||
ops = &w5500_ops; | ||
priv_size = sizeof(struct w5500_spi_priv); | ||
break; | ||
default: | ||
return -EINVAL; | ||
} | ||
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@@ -280,6 +443,7 @@ static int w5100_spi_remove(struct spi_device *spi) | |
static const struct spi_device_id w5100_spi_ids[] = { | ||
{ "w5100", W5100 }, | ||
{ "w5200", W5200 }, | ||
{ "w5500", W5500 }, | ||
{} | ||
}; | ||
MODULE_DEVICE_TABLE(spi, w5100_spi_ids); | ||
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@@ -295,6 +459,6 @@ static struct spi_driver w5100_spi_driver = { | |
}; | ||
module_spi_driver(w5100_spi_driver); | ||
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MODULE_DESCRIPTION("WIZnet W5100/W5200 Ethernet driver for SPI mode"); | ||
MODULE_DESCRIPTION("WIZnet W5100/W5200/W5500 Ethernet driver for SPI mode"); | ||
MODULE_AUTHOR("Akinobu Mita <[email protected]>"); | ||
MODULE_LICENSE("GPL"); |
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