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The Structural Simulation Toolkit (SST) was developed to explore innovations in highly concurrent systems where the ISA, microarchitecture, and memory interact with the programming model and communications system. The package provides two novel capabilities. The first is a fully modular design that enables extensive exploration of an individual system parameter without the need for intrusive changes to the simulator. The second is a parallel simulation environment based on MPI. This provides a high level of performance and the ability to look at large systems. The framework has been successfully used to model concepts ranging from processing in memory to conventional processors connected by conventional network interfaces and running MPI.
Visit sst-simulator.org to learn more about SST.
See Contributing to learn how to contribute to SST.
STONNE is a cycle-level microarchitectural simulator for flexible DNN inference accelerators. STONNE models all the major components required to build both first-generation rigid accelerators and next-generation flexible DNN accelerators. All the on-chip components are interconnected by using a three-tier network fabric composed of a Distribution Network(DN), a Multiplier Network (MN), and a Reduce Network(RN), inspired by the taxonomy of on-chip communication flows within DNN accelerators. These networks canbe configured to support any topology. Next, we describe the different topologies of the three networks (DN, MN and RN) currently supported in STONNE that are basic building blocks of state-of-the-art accelerators such as the Google’s TPU, Eyeriss-v2, ShDianNao, SCNN, MAERI and SIGMA, among others. These building blocks can also be seen in the figure presented below:
Visit stonne to learn more about STONNE Simulator.
STONNE has been integrated as a component called sstStonne in SST. sstStonne connects to memHierarchy component to faithfully model the memory hierarchy of the accelerator. A schematic view of sstStonne is presented below:
Please install sst-elements-with-stonne following the installation description presented in sst-simulator.org.
sstStonne must be instanstiated in the SST Configuration file, along with the memory hierarchy components and subcomponents that will be used to model the memory hierarchy. Please refer to our examples for further information:
- sst configuration file to run a convolution operation: tests/sst_stonne_conv.py
- sst configuration file to run a dense GEMM operation: tests/sst_stonne_gemm.py
- sst configuration file to run a sparse-sparse GEMM operation where the matrices are encoded using a bitmat format: tests/sst_stonne_bitmapSpMSpM.py
- sst configuration file to run a sparse-dense GEMM operation where the sparse matrix is encoded using a CSR format: tests/sst_stonne_csrSpMM.py
Also, refer to our scripts to generate the memory initialization files and calculate the memory address locations:
- Script for convolution operation: tests/gen_conv.py
- Script for dense GEMM operation: tests/gen_gemm.py
- Script for sparse-sparse GEMM operation where the matrices are encoded using a bitmat format: tests/gen_bitmapSpMSpM.py
Please remember to update the SST configuration file with the proper memory address locations and the proper memory intialization file for each kernel to be launched.
Please if you use sstStonne component cite us:
@INPROCEEDINGS{STONNE21,
author = {Francisco Mu{\~n}oz-Matr{\'i}nez and Jos{\'e} L. Abell{\'a}n and Manuel E. Acacio and Tushar Krishna},
title = {STONNE: Enabling Cycle-Level Microarchitectural Simulation for DNN Inference Accelerators},
booktitle = {2021 IEEE International Symposium on Workload Characterization (IISWC)},
year = {2021},
volume = {},
number = {},
pages = {},
}