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mpu9250: set accel DLPF to 41 Hz (PX4#5177)
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Previously, the accel DLPF was not set, so it's not clear what the
settings are or should be.
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julianoes authored and LorenzMeier committed Jul 31, 2016
1 parent d809fae commit dd70b37
Showing 1 changed file with 5 additions and 0 deletions.
5 changes: 5 additions & 0 deletions src/drivers/mpu9250/mpu9250.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -169,6 +169,8 @@
#define BITS_DLPF_CFG_3600HZ 0x07
#define BITS_DLPF_CFG_MASK 0x07

#define BITS_ACCEL_CONFIG2_41HZ 0x03

#define BIT_RAW_RDY_EN 0x01
#define BIT_INT_ANYRD_2CLEAR 0x10

Expand Down Expand Up @@ -471,6 +473,9 @@ int MPU9250::reset()
write_checked_reg(MPUREG_INT_PIN_CFG, BIT_INT_ANYRD_2CLEAR); // INT: Clear on any read
usleep(1000);

write_checked_reg(MPUREG_ACCEL_CONFIG2, BITS_ACCEL_CONFIG2_41HZ);
usleep(1000);

uint8_t retries = 10;

while (retries--) {
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