rw for u16

src/cpu/inner/mod.rs

@@ -12,45 +12,8 @@ pub use register::*;
 
 /*
 
-impl Dst<u8> for ZMem<Reg8> {
-    fn write(self, cpu: &mut Cpu, val: u8) {
-        let ZMem(reg) = self;
-        let offset = reg.read(cpu) as u16;
-        let addr = 0xff00 + offset;
-        cpu.interconnect.write(addr, val)
-    }
-}
-
-impl Dst<u8> for ZMem<Imm8> {
-    fn write(self, cpu: &mut Cpu, val: u8) {
-        let ZMem(imm) = self;
-        let offset = imm.read(cpu) as u16;
-        let addr = 0xff00 + offset;
-        cpu.interconnect.write(addr, val)
-    }
-}
 
 
-
-
-impl Src<u16> for Reg16 {
-    fn read(self, cpu: &mut Cpu) -> u16 {
-        cpu.reg.read_u16(self)
-    }
-}
-
-impl Src<u16> for Imm16 {
-    fn read(self, cpu: &mut Cpu) -> u16 {
-        cpu.fetch_u16()
-    }
-}
-
-impl Dst<u16> for Reg16 {
-    fn write(self, cpu: &mut Cpu, val: u16) {
-        cpu.reg.write_u16(self, val)
-    }
-}
-
 impl Dst<u16> for Mem<Imm16> {
     fn write(self, cpu: &mut Cpu, val: u16) {
         let Mem(imm) = self;

src/cpu/inner/register.rs

@@ -151,6 +151,30 @@ impl Dst<u8> for ZMem<Register> {
 }
 
 
+impl Src<u16> for Register {
+    unsafe fn read(&self, cpu: &mut CPU) -> u16 {
+        match self {
+            Register::D16 => cpu.pc.d16(),
+            _ => *(cpu.vaddr(self))
+        }
+    }
+}
+
+impl Dst<u16> for Register {
+    unsafe fn write(&self, cpu: &mut CPU, val: u16) { *(cpu.vaddr(self)) = val; }
+}
+
+impl Dst<u16> for Mem<Register> {
+    unsafe fn write(&self, cpu: &mut CPU, val: u16) {
+        let Mem(reg) = self;
+        let addr = *(cpu.vaddr(reg));
+        let l = val as u8;
+        let h = (val >> 8) as u8;
+        cpu.write_mem(addr, l);
+        cpu.write_mem(addr + 1, h);
+
+    }
+}
 
 impl Register {
     pub fn is_virtual(&self) -> bool {