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ASoC: tas2562: Fix TDM_CFG0_SAMPRATE values
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TAS2562_TDM_CFG0_SAMPRATE_MASK starts at bit 1, not 0.
So all values need to be left shifted by 1.

Signed-off-by: Richard Weinberger <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
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@richardweinberger @broonie
richardweinberger authored and broonie committed Jun 3, 2021
1 parent d031d99 commit 8bef925
Showing 1 changed file with 7 additions and 7 deletions.
14 changes: 7 additions & 7 deletions sound/soc/codecs/tas2562.h
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Original file line number Diff line number Diff line change
Expand Up @@ -57,13 +57,13 @@
#define TAS2562_TDM_CFG0_RAMPRATE_MASK BIT(5)
#define TAS2562_TDM_CFG0_RAMPRATE_44_1 BIT(5)
#define TAS2562_TDM_CFG0_SAMPRATE_MASK GENMASK(3, 1)
#define TAS2562_TDM_CFG0_SAMPRATE_7305_8KHZ 0x0
#define TAS2562_TDM_CFG0_SAMPRATE_14_7_16KHZ 0x1
#define TAS2562_TDM_CFG0_SAMPRATE_22_05_24KHZ 0x2
#define TAS2562_TDM_CFG0_SAMPRATE_29_4_32KHZ 0x3
#define TAS2562_TDM_CFG0_SAMPRATE_44_1_48KHZ 0x4
#define TAS2562_TDM_CFG0_SAMPRATE_88_2_96KHZ 0x5
#define TAS2562_TDM_CFG0_SAMPRATE_176_4_192KHZ 0x6
#define TAS2562_TDM_CFG0_SAMPRATE_7305_8KHZ (0x0 << 1)
#define TAS2562_TDM_CFG0_SAMPRATE_14_7_16KHZ (0x1 << 1)
#define TAS2562_TDM_CFG0_SAMPRATE_22_05_24KHZ (0x2 << 1)
#define TAS2562_TDM_CFG0_SAMPRATE_29_4_32KHZ (0x3 << 1)
#define TAS2562_TDM_CFG0_SAMPRATE_44_1_48KHZ (0x4 << 1)
#define TAS2562_TDM_CFG0_SAMPRATE_88_2_96KHZ (0x5 << 1)
#define TAS2562_TDM_CFG0_SAMPRATE_176_4_192KHZ (0x6 << 1)

#define TAS2562_TDM_CFG2_RIGHT_JUSTIFY BIT(6)

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