Added minimal documentation for AXI stream monitor and protocol checker.

FAIG2014 · Aug 2, 2018 · cc53a5d · cc53a5d
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diff --git a/docs/verification_components/user_guide.rst b/docs/verification_components/user_guide.rst
@@ -26,6 +26,8 @@ Included verification components (VCs):
 - AXI read slave
 - AXI write slave
 - AXI stream master
+- AXI stream monitor
+- AXI stream protocol checker
 - AXI stream slave
 - RAM master
 - Wishbone master

diff --git a/vunit/vhdl/verification_components/src/axi_stream_pkg.vhd b/vunit/vhdl/verification_components/src/axi_stream_pkg.vhd
@@ -36,6 +36,9 @@ package axi_stream_pkg is
     p_max_waits   => 0
   );
 
+  -- The default protocol checker is used to specify that the checker
+  -- configuration is defined by the parent component into which the checker is
+  -- instantiated.
   constant default_axi_stream_protocol_checker : axi_stream_protocol_checker_t := (
     p_type        => default_component,
     p_actor       => null_actor,
@@ -60,6 +63,9 @@ package axi_stream_pkg is
     p_protocol_checker => null_axi_stream_protocol_checker
   );
 
+  -- The default monitor is used to specify that the monitor
+  -- configuration is defined by the parent component into which the monitor is
+  -- instantiated.
   constant default_axi_stream_monitor : axi_stream_monitor_t := (
     p_type             => default_component,
     p_actor            => null_actor,