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axi_to_axi_lite: Remove restriction on FIFO alignment
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Our FIFOs support non-power of two sizes.
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zarubaf authored and andreaskurth committed Dec 3, 2019
1 parent 7da9fea commit c3e34c9
Showing 1 changed file with 2 additions and 7 deletions.
9 changes: 2 additions & 7 deletions src/axi_to_axi_lite.sv
Original file line number Diff line number Diff line change
Expand Up @@ -40,11 +40,6 @@ module axi_to_axi_lite #(
end
`endif

// Round the maximum number of pending transactions up to the next power of
// two. This is required by the implementation of the FIFO.
localparam int DEPTH_FIFO_RD = 2**$clog2(NUM_PENDING_RD);
localparam int DEPTH_FIFO_WR = 2**$clog2(NUM_PENDING_WR);

// The transaction information that will be stored locally.
typedef struct packed {
logic [$bits(in.r_id)-1:0] id;
Expand All @@ -70,7 +65,7 @@ module axi_to_axi_lite #(
meta_rd_t meta_rd;
meta_wr_t meta_wr;

fifo #(.dtype(meta_rd_t), .DEPTH(DEPTH_FIFO_RD)) i_fifo_rd (
fifo #(.dtype(meta_rd_t), .DEPTH(NUM_PENDING_RD)) i_fifo_rd (
.clk_i ( clk_i ),
.rst_ni ( rst_ni ),
.testmode_i ( testmode_i ),
Expand All @@ -88,7 +83,7 @@ module axi_to_axi_lite #(
.pop_i ( in.r_valid & in.r_ready & in.r_last )
);

fifo #(.dtype(meta_wr_t), .DEPTH(DEPTH_FIFO_WR)) i_fifo_wr (
fifo #(.dtype(meta_wr_t), .DEPTH(NUM_PENDING_WR)) i_fifo_wr (
.clk_i ( clk_i ),
.rst_ni ( rst_ni ),
.testmode_i ( testmode_i ),
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