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Commits on Oct 6, 2020

• Lock CoreDisTools package version to 1.0.1-prerelease-00005 in stress_dependencies.csproj (dotnet#42968)

  echesakov

  authored
  850788e

• CoreDisTools and R2RDump support Arm Thumb2 disassembling (dotnet#42964)

  Show description for 0c011a3
  echesakov

  authored
  0c011a3

• Small optimization in LSRA for RMW intrinsics (dotnet#42564)

  Show description for 83449c7
  echesakov

  authored
  83449c7

Commits on Sep 3, 2020

• Potential fix for folding of *(typ*)&lclVar for small types dotnet#40607 (dotnet#40871)

  Show description for 31e3508
  echesakov

  authored
  31e3508

Commits on Aug 18, 2020

• Disable System.Xml.Tests.SameInstanceXslTransformWriter.Variations under JitStress (dotnet#40964)

  echesakov

  authored
  2f4f15e

Commits on Aug 13, 2020

• Unconditionally expand some of the Vector128 methods on x86/x64 in zapinfo.cpp (dotnet#40688)

  echesakov

  authored
  a5c1d42

Commits on Aug 10, 2020

• Fix dotnet#33948 by decreasing number of tests per group (dotnet#40491)

  echesakov

  authored
  4988c25

Commits on Aug 8, 2020

• [Arm64] Treat methods of non-generic Vector64 and Vector128 classes as intrinsics (dotnet#40441)

  echesakov

  authored
  1db5808

• When returning a SIMD value use v0 register as the candidate for source operand of GT_RETURN in case when it is a single-register local variable

  echesakov

  authored
  85d2bbc

Commits on Aug 6, 2020

• [Arm64] Treat Math/MathF.FusedMultiplyAdd as intrinsics (dotnet#40124)

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  echesakov

  authored
  a1da393

Commits on Jul 30, 2020

• Consider that retbuf arg can point to GC heap in fgCreateCallDispatcherAndGetResult() (dotnet#39815)

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  echesakov

  authored
  1e23a06

Commits on Jul 25, 2020

• [Arm64] Don't generate hardware intrinsic method bodies (dotnet#39753)

  Show description for 84eeebb
  echesakov

  authored
  84eeebb

Commits on Jul 24, 2020

• Fix issues with JitStressRange (dotnet#39754)

  Show description for 8782d4b
  echesakov

  authored
  8782d4b

Commits on Jul 14, 2020

• [Arm64] ASIMD StorePair StorePairNonTemporal (dotnet#39240)

  Show description for 43b2578
  echesakov

  authored
  43b2578

Commits on Jul 13, 2020

• [Arm64] ASIMD DotProduct and Rounding Double Multiply Add/Subtract (dotnet#38957)

  Show description for d9a7d8f
  echesakov

  authored
  d9a7d8f

Commits on Jul 7, 2020

• [Arm64] ASIMD ReverseElement8 ReverseElement16 ReverseElement32 (dotnet#38850)

  echesakov

  authored
  a014fbd

• [Arm64] ASIMD MultiplyDoubling* and MultiplyRoundedDoubling* intrinsics (dotnet#38725)

  Show description for ccc34b3
  echesakov

  authored
  ccc34b3

Commits on Jul 2, 2020

• [Arm64] ASIMD InsertScalar and rename to ShiftLeftAndInsert ShiftRightAndInsert (dotnet#38680)

  Show description for eaf3c78
  echesakov

  authored
  eaf3c78

Commits on Jun 30, 2020

• [Arm64] ASIMD ExtractNarrowingSaturate and ExtractNarrowingSaturateUnsigned (dotnet#38371)

  Show description for d42d28b
  echesakov

  authored
  d42d28b

Commits on Jun 25, 2020

• [Arm64] Implement remaining SIMD instructions (dotnet#38361)

  Show description for eb30d2a
  echesakov

  authored
  eb30d2a

Commits on Jun 22, 2020

• [Arm64] Vector64<double>.CreateScalar, Vector64<ulong>CreateScalar and Vector64<long>.CreateScalar (dotnet#38139)

  echesakov

  authored
  ab119ad

Commits on Jun 19, 2020

• [Arm64] ASIMD Miscellaneous (dotnet#38110)

  Show description for 63c60f1
  echesakov

  authored
  63c60f1

Commits on Jun 18, 2020

• [Arm64] Implement fcvtxn, fcvtxn2, sqabs, sqneg, suqadd, usqadd (dotnet#38010)

  echesakov

  authored
  cf7ce3b

Commits on Jun 17, 2020

• [Arm64] ASIMD By Element Intrinsics (dotnet#36916)

  Show description for a23d3b2
  echesakov

  authored
  a23d3b2

Commits on May 23, 2020

• [Arm64] ASIMD Shift Intrinsics (dotnet#36830)

  Show description for a26363e
  echesakov

  authored
  a26363e

Commits on May 22, 2020

• [Arm64] Follow-up on renaming intrinsics to Narrowing for consistency with Widening (dotnet#36857)

  Show description for d81a276
  echesakov

  authored
  d81a276

• [Arm64] Polynomial Multiply Long Intrinsics (dotnet#36853)

  Show description for 1c18e8c
  echesakov

  authored
  1c18e8c

Commits on May 21, 2020

• [Arm64] ASIMD Shift instructions (dotnet#36552)

  Show description for bdc0943
  echesakov

  authored
  bdc0943

Commits on May 7, 2020

• [Arm64] ASIMD Rename AddReturningHighNarrow to AddHighNarrow (dotnet#35919)

  Show description for 08b244e
  echesakov

  authored
  08b244e

Commits on May 1, 2020

• [Arm64] Fix JIT/HardwareIntrinsics/Arm/AdvSimd tests (dotnet#35726)

  Show description for 44a3313
  echesakov

  authored
  44a3313

• [Arm64] Implement ASIMD widening, narrowing, saturating intrinsics (dotnet#35612)

  Show description for a156293
  echesakov

  authored
  a156293

Commits on Apr 30, 2020

• [Arm64] Implement Vector64/128.CreateScalar() using AdvSimd.Insert (dotnet#35300)

  echesakov

  authored
  670bf21

• Remove HW_Flag_UnfixedSIMDSize (dotnet#35594)

  Show description for 1f436e0
  echesakov

  authored
  1f436e0

Commits on Apr 29, 2020

• [Arm64] Implement ASIMD widening, narrowing, saturating instructions (dotnet#35379)

  echesakov

  authored
  f03d585

Commits on Apr 22, 2020

• [Arm64] Implement ASIMD Extract Insert ExtractVector64 ExtractVector128 (dotnet#35030)

  Show description for 32dd7d4
  echesakov

  authored
  32dd7d4

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