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deca_usb3_cam.qsf
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deca_usb3_cam.qsf
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# -------------------------------------------------------------------------- #
#
# Copyright (C) 2018 Intel Corporation. All rights reserved.
# Your use of Intel Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Intel Program License
# Subscription Agreement, the Intel Quartus Prime License Agreement,
# the Intel FPGA IP License Agreement, or other applicable license
# agreement, including, without limitation, that your use is for
# the sole purpose of programming logic devices manufactured by
# Intel and sold by Intel or its authorized distributors. Please
# refer to the applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus Prime
# Version 18.0.0 Build 614 04/24/2018 SJ Lite Edition
# Date created = 17:18:16 September 01, 2021
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
# deca_usb3_cam_assignment_defaults.qdf
# If this file doesn't exist, see file:
# assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus Prime software
# and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #
set_global_assignment -name FAMILY "MAX 10"
set_global_assignment -name DEVICE 10M50DAF484C6GES
set_global_assignment -name TOP_LEVEL_ENTITY deca_usb3_cam
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 18.0.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:18:16 SEPTEMBER 01, 2021"
set_global_assignment -name LAST_QUARTUS_VERSION "20.1.1 Lite Edition"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256
set_global_assignment -name EDA_SIMULATION_TOOL "<None>"
set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT NONE -section_id eda_simulation
set_global_assignment -name ENABLE_OCT_DONE OFF
set_global_assignment -name EXTERNAL_FLASH_FALLBACK_ADDRESS 00000000
set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
set_global_assignment -name INTERNAL_FLASH_UPDATE_MODE "SINGLE IMAGE WITH ERAM"
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name SDC_FILE deca_usb3_cam.sdc
set_global_assignment -name VERILOG_FILE rtl/deca_usb3_cam.v
set_global_assignment -name VERILOG_FILE rtl/sync.v
set_global_assignment -name VERILOG_FILE rtl/main_fsm.v
set_global_assignment -name VERILOG_FILE rtl/detect_edge.v
set_global_assignment -name VERILOG_FILE rtl/dc_data_fifo.v
set_global_assignment -name VERILOG_FILE rtl/cam_capture.v
set_global_assignment -name VERILOG_FILE rtl/cam_config/SCCB_interface.v
set_global_assignment -name VERILOG_FILE rtl/cam_config/OV7670_config_rom_mif.v
set_global_assignment -name VERILOG_FILE rtl/cam_config/OV7670_config.v
set_global_assignment -name VERILOG_FILE rtl/cam_config/camera_configure.v
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_instance_assignment -name IO_STANDARD "1.5 V SCHMITT TRIGGER" -to rst_n
set_location_assignment PIN_H21 -to rst_n
set_location_assignment PIN_J9 -to sioc
set_location_assignment PIN_H3 -to siod
set_location_assignment PIN_AA7 -to VSYNC_cam
set_location_assignment PIN_AB6 -to HREF_cam
set_location_assignment PIN_AB7 -to PCLK_cam
set_location_assignment PIN_R11 -to XCLK_cam
set_location_assignment PIN_V7 -to data_cam[7]
set_location_assignment PIN_AB8 -to data_cam[6]
set_location_assignment PIN_V8 -to data_cam[5]
set_location_assignment PIN_W8 -to data_cam[4]
set_location_assignment PIN_W7 -to data_cam[3]
set_location_assignment PIN_W6 -to data_cam[2]
set_location_assignment PIN_Y6 -to data_cam[1]
set_location_assignment PIN_Y5 -to data_cam[0]
set_location_assignment PIN_K5 -to on_off_cam
set_location_assignment PIN_P11 -to clk_50
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to clk_50
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to siod
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to sioc
set_location_assignment PIN_J4 -to res_cam
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to HREF_cam
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to PCLK_cam
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to VSYNC_cam
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to XCLK_cam
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to data_cam[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to data_cam[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to data_cam[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to data_cam[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to data_cam[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to data_cam[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to data_cam[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to data_cam[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to on_off_cam
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to res_cam
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to sioc
set_instance_assignment -name IO_STANDARD "3.3-V LVCMOS" -to siod
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DMA0_Ready
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DMA0_Watermark
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DMA1_Ready
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DMA1_Watermark
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[15]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[14]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[13]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[12]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[11]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[10]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[9]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[8]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DQ[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to RD
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to USB_CLK
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to WR
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to OE
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to LastWRData
set_location_assignment PIN_U15 -to DQ[15]
set_location_assignment PIN_V13 -to DQ[14]
set_location_assignment PIN_W12 -to DQ[13]
set_location_assignment PIN_Y11 -to DQ[12]
set_location_assignment PIN_AB10 -to DQ[11]
set_location_assignment PIN_AB12 -to DQ[10]
set_location_assignment PIN_AB14 -to DQ[9]
set_location_assignment PIN_AB15 -to DQ[8]
set_location_assignment PIN_AB17 -to DQ[7]
set_location_assignment PIN_V16 -to DQ[6]
set_location_assignment PIN_AB19 -to DQ[5]
set_location_assignment PIN_AB21 -to DQ[4]
set_location_assignment PIN_AA20 -to DQ[3]
set_location_assignment PIN_AA17 -to DQ[2]
set_location_assignment PIN_Y18 -to DQ[1]
set_location_assignment PIN_W18 -to DQ[0]
set_location_assignment PIN_AB11 -to LastWRData
set_location_assignment PIN_AB20 -to RD
set_location_assignment PIN_Y19 -to USB_CLK
set_location_assignment PIN_AA19 -to WR
set_location_assignment PIN_Y16 -to OE
set_instance_assignment -name FAST_INPUT_REGISTER ON -to DMA0_Ready
set_instance_assignment -name FAST_INPUT_REGISTER ON -to DMA1_Ready
set_instance_assignment -name FAST_INPUT_REGISTER ON -to DMA0_Watermark
set_instance_assignment -name FAST_INPUT_REGISTER ON -to DMA1_Watermark
set_instance_assignment -name FAST_INPUT_REGISTER ON -to DQ[0]
set_instance_assignment -name FAST_INPUT_REGISTER ON -to DQ[1]
set_instance_assignment -name FAST_INPUT_REGISTER ON -to DQ[2]
set_instance_assignment -name FAST_INPUT_REGISTER ON -to DQ[3]
set_instance_assignment -name FAST_INPUT_REGISTER ON -to DQ[4]
set_instance_assignment -name FAST_INPUT_REGISTER ON -to DQ[5]
set_instance_assignment -name FAST_INPUT_REGISTER ON -to DQ[6]
set_instance_assignment -name FAST_INPUT_REGISTER ON -to DQ[7]
set_instance_assignment -name FAST_INPUT_REGISTER ON -to DQ[8]
set_instance_assignment -name FAST_INPUT_REGISTER ON -to DQ[9]
set_instance_assignment -name FAST_INPUT_REGISTER ON -to DQ[10]
set_instance_assignment -name FAST_INPUT_REGISTER ON -to DQ[11]
set_instance_assignment -name FAST_INPUT_REGISTER ON -to DQ[12]
set_instance_assignment -name FAST_INPUT_REGISTER ON -to DQ[13]
set_instance_assignment -name FAST_INPUT_REGISTER ON -to DQ[14]
set_instance_assignment -name FAST_INPUT_REGISTER ON -to DQ[15]
set_location_assignment PIN_V15 -to DMA0_Ready
set_location_assignment PIN_AB16 -to DMA0_Watermark
set_location_assignment PIN_Y14 -to DMA1_Ready
set_location_assignment PIN_AB13 -to DMA1_Watermark
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE stp1.stp
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_timing
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_symbol
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_signal_integrity
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_boundary_scan
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top