z80: fix IM0 and simplify IRQ implementation

LIJI32 · Sep 19, 2022 · c66e347 · c66e347
1 parent 1792425
commit c66e347
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Showing 9 changed files with 41 additions and 30 deletions.
diff --git a/ares/component/processor/z80/z80.cpp b/ares/component/processor/z80/z80.cpp
@@ -45,26 +45,17 @@ auto Z80::reset() -> void {
   IM = 0;
 }
 
-auto Z80::irq(bool maskable, n16 pc, n8 extbus) -> bool {
+auto Z80::irq(n8 extbus) -> bool {
   //do not execute maskable interrupts if disabled or immediately after EI instruction
-  if(maskable && (!IFF1 || EI)) return false;
+  if(!IFF1 || EI) return false;
   R.bit(0,6)++;
 
-  push(PC);
-
-  switch(maskable ? IM : (n2)1) {
-
+  switch(IM) {
+  case 1: extbus = 0xff;
   case 0: {
-    //external data bus ($ff = RST $38)
     WZ = extbus;
-    wait(extbus | 0x38 == 0xff ? 6 : 7);
-    break;
-  }
-
-  case 1: {
-    //constant address
-    WZ = pc;
-    wait(maskable ? 7 : 5);
+    wait(6);
+    instruction(WZ);
     break;
   }
 
@@ -74,18 +65,37 @@ auto Z80::irq(bool maskable, n16 pc, n8 extbus) -> bool {
     WZL = read(address + 0);
     WZH = read(address + 1);
     wait(7);
+    push(PC);
+    PC = WZ;
     break;
   }
 
   }
 
+  IFF1 = 0;
+  IFF2 = 0;
+  HALT = 0;
+  if(P) PF = 0;
+  P = 0;
+  Q = 0;
+
+  return true;
+}
+
+auto Z80::nmi() -> bool {
+  R.bit(0,6)++;
+
+  push(PC);
+  WZ = 0x66;
+  wait(5);
   PC = WZ;
+
   IFF1 = 0;
-  if(maskable) IFF2 = 0;
   HALT = 0;
   if(P) PF = 0;
   P = 0;
   Q = 0;
+
   return true;
 }
 

diff --git a/ares/component/processor/z80/z80.hpp b/ares/component/processor/z80/z80.hpp
@@ -24,7 +24,8 @@ struct Z80 {
   auto power(MOSFET = MOSFET::NMOS) -> void;
   auto reset() -> void;
 
-  auto irq(bool maskable, n16 vector = 0x0000, n8 extbus = 0xff) -> bool;
+  auto irq(n8 extbus = 0xff) -> bool;
+  auto nmi() -> bool;
   auto parity(n8) const -> bool;
 
   //memory.cpp

diff --git a/ares/cv/cpu/cpu.cpp b/ares/cv/cpu/cpu.cpp
@@ -27,13 +27,13 @@ auto CPU::main() -> void {
   if(state.nmiPending) {
     state.nmiPending = 0;  //edge-sensitive
     debugger.interrupt("NMI");
-    irq(0, 0x0066, 0xff);
+    nmi();
   }
 
   if(state.irqLine) {
     //level-sensitive
     debugger.interrupt("IRQ");
-    irq(1, 0x0038, 0xff);
+    irq();
   }
 
   debugger.instruction();

diff --git a/ares/md/apu/apu.cpp b/ares/md/apu/apu.cpp
@@ -28,13 +28,13 @@ auto APU::main() -> void {
   if(state.nmiLine) {
     state.nmiLine = 0;  //edge-sensitive
     debugger.interrupt("NMI");
-    irq(0, 0x0066, 0xff);
+    nmi();
   }
 
   if(state.intLine) {
     //level-sensitive
     debugger.interrupt("IRQ");
-    irq(1, 0x0038, 0xff);
+    irq();
   }
 
   debugger.instruction();

diff --git a/ares/ms/cpu/cpu.cpp b/ares/ms/cpu/cpu.cpp
@@ -24,14 +24,14 @@ auto CPU::unload() -> void {
 auto CPU::main() -> void {
   if(state.nmiLine) {
     state.nmiLine = 0;  //edge-sensitive
-    if(irq(0, 0x0066, 0xff)) {
+    if(nmi()) {
       debugger.interrupt("NMI");
     }
   }
 
   if(state.irqLine) {
     //level-sensitive
-    if(irq(1, 0x0038, 0xff)) {
+    if(irq()) {
       debugger.interrupt("IRQ");
     }
   }

diff --git a/ares/msx/cpu/cpu.cpp b/ares/msx/cpu/cpu.cpp
@@ -25,7 +25,7 @@ auto CPU::unload() -> void {
 auto CPU::main() -> void {
   if(io.irqLine) {
     debugger.interrupt("IRQ");
-    irq(1, 0x0038, 0xff);
+    irq();
   }
 
   debugger.instruction();

diff --git a/ares/ng/apu/apu.cpp b/ares/ng/apu/apu.cpp
@@ -21,13 +21,13 @@ auto APU::unload() -> void {
 
 auto APU::main() -> void {
   if(nmi.pending && nmi.enable) {
-    Z80::irq(0, 0x0066, 0xff);
+    Z80::nmi();
     nmi.pending = 0;
     debugger.interrupt("NMI");
   }
 
   if(irq.pending) {
-    Z80::irq(1, 0x0038, 0xff);
+    Z80::irq();
     irq.pending = 0;
     debugger.interrupt("IRQ");
   }

diff --git a/ares/ngp/apu/apu.cpp b/ares/ngp/apu/apu.cpp
@@ -36,13 +36,13 @@ auto APU::main() -> void {
   if(nmi.line) {
     nmi.line = 0;  //edge-sensitive
     debugger.interrupt("NMI");
-    Z80::irq(0, 0x0066, 0xff);
+    Z80::nmi();
   }
 
   if(irq.line) {
     //level-sensitive
     debugger.interrupt("IRQ");
-    Z80::irq(1, 0x0038, 0xff);
+    Z80::irq();
   }
 
   debugger.instruction();

diff --git a/ares/sg/cpu/cpu.cpp b/ares/sg/cpu/cpu.cpp
@@ -26,13 +26,13 @@ auto CPU::main() -> void {
   if(state.nmiLine) {
     state.nmiLine = 0;  //edge-sensitive
     debugger.interrupt("NMI");
-    irq(0, 0x0066, 0xff);
+    nmi();
   }
 
   if(state.irqLine) {
     //level-sensitive
     debugger.interrupt("IRQ");
-    irq(1, 0x0038, 0xff);
+    irq();
   }
 
   debugger.instruction();