boards: arm64: add Renesas H3ULCB CA57 board support

Add basic functionality for supporting h3ulcb board:
  * add documentation for h3ulcb board;
  * add pinctrl dtsi for scif driver;
  * add dts, yaml and configuration files.

Signed-off-by: Mykola Kvach <[email protected]>

boards/arm64/rcar_h3ulcb_ca57/Kconfig.board

@@ -0,0 +1,6 @@
+# Copyright (c) 2023 EPAM Systems
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_RCAR_H3ULCB_CA57
+	bool "Renesas H3ULCB"
+	depends on SOC_ARM64_R8A77951

boards/arm64/rcar_h3ulcb_ca57/Kconfig.defconfig

@@ -0,0 +1,12 @@
+# Copyright (c) 2023 EPAM Systems
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_RCAR_H3ULCB_CA57
+
+config BOARD
+	default "rcar_h3ulcb_ca57"
+
+config BUILD_OUTPUT_BIN
+	default y
+
+endif # BOARD_RCAR_H3ULCB_CA57

boards/arm64/rcar_h3ulcb_ca57/doc/index.rst

@@ -0,0 +1,86 @@
+.. _rcar_h3ulcb_ca57:
+
+R-CAR H3 ARM CA57 (ARMv8)
+#########################
+
+Overview
+********
+The R-Car H3 is an SOC that features the basic functions for next-generation
+car navigation systems.
+
+Hardware
+********
+The R-Car H3 includes:
+
+* four 1.5-GHz ARM Cortex-A57 MPCore cores;
+* four 1.2-GHz ARM Cortex-A53 MPCore cores;
+* memory controller for LPDDR4-3200 with 32 bits x 4 channels;
+* 2 channels for HDMI1.4b output and 1channel for RGB888 output and 1channel for LVDS;
+* 4 channels MIPI-CSI2 Video Input, 2channels digital Video Input;
+* serial ATA interface;
+* USB3.0 x 2ch and USB2.0 x 3ch interfaces;
+* 800-MHz ARM Cortex-R7 core;
+* two- and three-dimensional graphics engines;
+* video processing units;
+* sound processing units;
+* MediaLB interface;
+* SD card host interface;
+* USB3.0 and USB2.0 interfaces;
+* PCI Express interface;
+* CAN interface;
+* EtherAVB.
+
+Connections and IOs
+===================
+
+H3ULCB Board
+------------
+
+Here are official IOs figures from eLinux for H3ULCB board:
+
+.. figure:: img/rcar_h3ulcb_top.jpg
+   :align: center
+
+.. figure:: img/rcar_h3ulcb_bottom.jpg
+   :align: center
+
+Supported Features
+==================
+The Renesas rcar_h3ulcb_ca57 board configuration supports the following
+hardware features:
+
++-----------+------------------------------+--------------------------------+
+| Interface | Driver/components            | Support level                  |
++===========+==============================+================================+
+| PINCTRL   | pinctrl                      |                                |
++-----------+------------------------------+--------------------------------+
+| CLOCK     | clock_control                |                                |
++-----------+------------------------------+--------------------------------+
+| UART      | uart                         | serial port-polling            |
++-----------+------------------------------+--------------------------------+
+
+Other hardware features have not been enabled yet for this board.
+
+The default configuration can be found in the defconfig file:
+
+        ``boards/arm64/rcar_h3ulcb_ca57/rcar_h3ulcb_ca57_defconfig``
+
+Programming and Debugging
+*************************
+
+Flashing
+========
+
+The flash on board is not supported by Zephyr at this time.
+
+References
+**********
+
+- `Renesas R-Car Development Support website`_
+- `eLinux R-Car Starter Kit page`_
+
+.. _Renesas R-Car Development Support website:
+   https://www.renesas.com/us/en/support/partners/r-car-consortium/r-car-development-support
+
+.. _eLinux R-Car Starter Kit page:
+   https://elinux.org/R-Car/Boards/H3SK

boards/arm64/rcar_h3ulcb_ca57/rcar_h3ulcb_ca57-pinctrl.dtsi

@@ -0,0 +1,17 @@
+/*
+ * Copyright (c) 2023 EPAM Systems
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-r8a77951.h>
+
+&pfc {
+	scif2_data_a_tx_default: scif2_data_a_tx_default {
+		pin = <PIN_TX2_A FUNC_TX2_A>;
+	};
+
+	scif2_data_a_rx_default: scif2_data_a_rx_default {
+		pin = <PIN_RX2_A FUNC_RX2_A>;
+	};
+};

boards/arm64/rcar_h3ulcb_ca57/rcar_h3ulcb_ca57.dts

@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2023 EPAM Systems
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ */
+
+/dts-v1/;
+#include <mem.h>
+#include <arm64/renesas/r8a77951.dtsi>
+#include "rcar_h3ulcb_ca57-pinctrl.dtsi"
+
+/ {
+	model = "H3ULCB CA57";
+
+	chosen {
+		zephyr,sram = &ram;
+		zephyr,console = &scif2;
+		zephyr,shell-uart = &scif2;
+	};
+
+	ram: memory@48000000 {
+		device_type = "mmio-sram";
+		reg = <0x0 0x48000000 0x0 DT_SIZE_M(512)>;
+	};
+};
+
+&scif2 {
+	pinctrl-0 = <&scif2_data_a_tx_default &scif2_data_a_rx_default>;
+	pinctrl-names = "default";
+	status = "okay";
+};

boards/arm64/rcar_h3ulcb_ca57/rcar_h3ulcb_ca57.yaml

@@ -0,0 +1,17 @@
+identifier: rcar_h3ulcb_ca57
+name: Renesas H3ULCB based on r8a77951
+type: mcu
+arch: arm64
+toolchain:
+  - zephyr
+  - cross-compile
+ram: 512
+supported:
+  - clock_control
+  - uart
+testing:
+  default: true
+  ignore_tags:
+    - net
+    - bluetooth
+    - isotp

boards/arm64/rcar_h3ulcb_ca57/rcar_h3ulcb_ca57_defconfig

@@ -0,0 +1,21 @@
+CONFIG_SOC_ARM64_R8A77951=y
+CONFIG_SOC_SERIES_RCAR_GEN3=y
+CONFIG_BOARD_RCAR_H3ULCB_CA57=y
+
+# Cache management
+CONFIG_CACHE_MANAGEMENT=y
+
+# Enable UART driver
+CONFIG_SERIAL=y
+CONFIG_AARCH64_IMAGE_HEADER=y
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=8300000
+CONFIG_XIP=n
+
+CONFIG_MAX_XLAT_TABLES=24
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Enable clock control
+CONFIG_CLOCK_CONTROL=y

tests/drivers/fuel_gauge/sbs_gauge/testcase.yaml

@@ -17,6 +17,7 @@ tests:
       - qemu_kvm_arm64
       - xenvm
       - xenvm_gicv3
+      - rcar_h3ulcb_ca57
     integration_platforms:
       - qemu_x86
   drivers.sbs_gauge_new_api.emulated_64_bit_i2c_addr: