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mlx5: DR, Allow encap action for RX for supporting devices
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Enable encap l3/l2 in RX flow for devices that allow that.
We can use the action state machine for these kind of actions now and to
make sure only the following is allowed:
From decap/modify-header/pop-vlan to encap, and from encap to
termination.

Signed-off-by: Erez Shitrit <[email protected]>
Signed-off-by: Alex Vesker <[email protected]>
Signed-off-by: Yishai Hadas <[email protected]>
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@erezshitrit
erezshitrit authored and Yishai Hadas committed May 5, 2021
1 parent 60611a4 commit d2887d5
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Showing 3 changed files with 95 additions and 15 deletions.
49 changes: 49 additions & 0 deletions providers/mlx5/dr_action.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -74,6 +74,8 @@ static const enum dr_action_valid_state next_action_state[DR_ACTION_DOMAIN_MAX]
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_TNL_L2_TO_L2] = DR_ACTION_STATE_DECAP,
[DR_ACTION_TYP_TNL_L3_TO_L2] = DR_ACTION_STATE_DECAP,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_POP_VLAN,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
Expand All @@ -95,6 +97,8 @@ static const enum dr_action_valid_state next_action_state[DR_ACTION_DOMAIN_MAX]
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
},
[DR_ACTION_STATE_MODIFY_HDR] = {
[DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
Expand All @@ -108,6 +112,8 @@ static const enum dr_action_valid_state next_action_state[DR_ACTION_DOMAIN_MAX]
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
},
[DR_ACTION_STATE_POP_VLAN] = {
[DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
Expand All @@ -122,6 +128,8 @@ static const enum dr_action_valid_state next_action_state[DR_ACTION_DOMAIN_MAX]
[DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
},
[DR_ACTION_STATE_PUSH_VLAN] = {
[DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
Expand All @@ -133,6 +141,8 @@ static const enum dr_action_valid_state next_action_state[DR_ACTION_DOMAIN_MAX]
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
},
[DR_ACTION_STATE_NON_TERM] = {
[DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
Expand All @@ -152,6 +162,8 @@ static const enum dr_action_valid_state next_action_state[DR_ACTION_DOMAIN_MAX]
[DR_ACTION_TYP_MISS] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
},
[DR_ACTION_STATE_ASO] = {
[DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
Expand All @@ -163,6 +175,16 @@ static const enum dr_action_valid_state next_action_state[DR_ACTION_DOMAIN_MAX]
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
},
[DR_ACTION_STATE_ENCAP] = {
[DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_TAG] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_ASO,
},
[DR_ACTION_STATE_TERM] = {
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_TERM,
},
Expand Down Expand Up @@ -268,6 +290,8 @@ static const enum dr_action_valid_state next_action_state[DR_ACTION_DOMAIN_MAX]
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_MISS] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
},
[DR_ACTION_STATE_DECAP] = {
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
Expand All @@ -282,6 +306,17 @@ static const enum dr_action_valid_state next_action_state[DR_ACTION_DOMAIN_MAX]
[DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
},
[DR_ACTION_STATE_ENCAP] = {
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_METER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_CTR] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_ASO_FIRST_HIT] = DR_ACTION_STATE_ASO,
},
[DR_ACTION_STATE_MODIFY_HDR] = {
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
Expand All @@ -294,6 +329,8 @@ static const enum dr_action_valid_state next_action_state[DR_ACTION_DOMAIN_MAX]
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_PUSH_VLAN,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
},
[DR_ACTION_STATE_POP_VLAN] = {
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
Expand All @@ -307,6 +344,8 @@ static const enum dr_action_valid_state next_action_state[DR_ACTION_DOMAIN_MAX]
[DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
},
[DR_ACTION_STATE_PUSH_VLAN] = {
[DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM,
Expand All @@ -318,6 +357,8 @@ static const enum dr_action_valid_state next_action_state[DR_ACTION_DOMAIN_MAX]
[DR_ACTION_TYP_SAMPLER] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_DEST_ARRAY] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
},
[DR_ACTION_STATE_NON_TERM] = {
[DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM,
Expand All @@ -336,6 +377,8 @@ static const enum dr_action_valid_state next_action_state[DR_ACTION_DOMAIN_MAX]
[DR_ACTION_TYP_MISS] = DR_ACTION_STATE_TERM,
[DR_ACTION_TYP_ASO_FLOW_METER] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_ASO_CT] = DR_ACTION_STATE_ASO,
[DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_ENCAP,
[DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_ENCAP,
},
[DR_ACTION_STATE_ASO] = {
[DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM,
Expand Down Expand Up @@ -651,6 +694,12 @@ int dr_actions_build_ste_arr(struct mlx5dv_dr_matcher *matcher,
dr_dbg(dmn, "Root encap action cannot be used on current table\n");
goto out_invalid_arg;
}
if (rx_rule &&
!(dmn->ste_ctx->actions_caps & DR_STE_CTX_ACTION_CAP_RX_ENCAP)) {
dr_dbg(dmn, "Device doesn't support Encap on RX\n");
goto out_invalid_arg;
}

attr.reformat_size = action->reformat.reformat_size;
attr.reformat_id = action->reformat.dvo->object_id;
attr.prio_tag_required = dmn->info.caps.prio_tag_required;
Expand Down
60 changes: 45 additions & 15 deletions providers/mlx5/dr_ste_v1.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -415,8 +415,8 @@ static void dr_ste_v1_set_reparse(uint8_t *hw_ste_p)
DR_STE_SET(match_bwc_v1, hw_ste_p, reparse, 1);
}

static void dr_ste_v1_set_tx_encap(uint8_t *hw_ste_p, uint8_t *d_action,
uint32_t reformat_id, int size)
static void dr_ste_v1_set_encap(uint8_t *hw_ste_p, uint8_t *d_action,
uint32_t reformat_id, int size)
{
DR_STE_SET(double_action_insert_with_ptr_v1, d_action, action_id,
DR_STE_V1_ACTION_ID_INSERT_POINTER);
Expand Down Expand Up @@ -455,11 +455,11 @@ static void dr_ste_v1_set_pop_vlan(uint8_t *hw_ste_p, uint8_t *s_action,
dr_ste_v1_set_reparse(hw_ste_p);
}

static void dr_ste_v1_set_tx_encap_l3(uint8_t *hw_ste_p,
uint8_t *frst_s_action,
uint8_t *scnd_d_action,
uint32_t reformat_id,
int size)
static void dr_ste_v1_set_encap_l3(uint8_t *hw_ste_p,
uint8_t *frst_s_action,
uint8_t *scnd_d_action,
uint32_t reformat_id,
int size)
{
/* Remove L2 headers */
DR_STE_SET(single_action_remove_header_v1, frst_s_action, action_id,
Expand Down Expand Up @@ -718,9 +718,9 @@ static void dr_ste_v1_set_actions_tx(uint8_t *action_type_set,
action_sz = DR_STE_ACTION_TRIPLE_SZ;
allow_encap = true;
}
dr_ste_v1_set_tx_encap(last_ste, action,
attr->reformat_id,
attr->reformat_size);
dr_ste_v1_set_encap(last_ste, action,
attr->reformat_id,
attr->reformat_size);
action_sz -= DR_STE_ACTION_DOUBLE_SZ;
action += DR_STE_ACTION_DOUBLE_SZ;
} else if (action_type_set[DR_ACTION_TYP_L2_TO_TNL_L3]) {
Expand All @@ -731,10 +731,10 @@ static void dr_ste_v1_set_actions_tx(uint8_t *action_type_set,
action_sz = DR_STE_ACTION_TRIPLE_SZ;
d_action = action + DR_STE_ACTION_SINGLE_SZ;

dr_ste_v1_set_tx_encap_l3(last_ste,
action, d_action,
attr->reformat_id,
attr->reformat_size);
dr_ste_v1_set_encap_l3(last_ste,
action, d_action,
attr->reformat_id,
attr->reformat_size);
action_sz -= DR_STE_ACTION_TRIPLE_SZ;
action += DR_STE_ACTION_TRIPLE_SZ;
}
Expand Down Expand Up @@ -904,6 +904,35 @@ static void dr_ste_v1_set_actions_rx(uint8_t *action_type_set,
dr_ste_v1_set_counter_id(last_ste, attr->ctr_id);
}

if (action_type_set[DR_ACTION_TYP_L2_TO_TNL_L2]) {
if (action_sz < DR_STE_ACTION_DOUBLE_SZ) {
dr_ste_v1_arr_init_next_match(&last_ste, added_stes, attr->gvmi);
action = DEVX_ADDR_OF(ste_mask_and_match_v1, last_ste, action);
action_sz = DR_STE_ACTION_TRIPLE_SZ;
}
dr_ste_v1_set_encap(last_ste, action,
attr->reformat_id,
attr->reformat_size);
action_sz -= DR_STE_ACTION_DOUBLE_SZ;
action += DR_STE_ACTION_DOUBLE_SZ;
} else if (action_type_set[DR_ACTION_TYP_L2_TO_TNL_L3]) {
u8 *d_action;

if (action_sz < DR_STE_ACTION_TRIPLE_SZ) {
dr_ste_v1_arr_init_next_match(&last_ste, added_stes, attr->gvmi);
action = DEVX_ADDR_OF(ste_mask_and_match_v1, last_ste, action);
action_sz = DR_STE_ACTION_TRIPLE_SZ;
}

d_action = action + DR_STE_ACTION_SINGLE_SZ;

dr_ste_v1_set_encap_l3(last_ste,
action, d_action,
attr->reformat_id,
attr->reformat_size);
action_sz -= DR_STE_ACTION_TRIPLE_SZ;
}

dr_ste_v1_set_hit_addr(last_ste, attr->final_icm_addr, 1);
}

Expand Down Expand Up @@ -2130,7 +2159,8 @@ static struct dr_ste_ctx ste_ctx_v1 = {
.get_byte_mask = &dr_ste_v1_get_byte_mask,
/* Actions */
.actions_caps = DR_STE_CTX_ACTION_CAP_TX_POP |
DR_STE_CTX_ACTION_CAP_RX_PUSH,
DR_STE_CTX_ACTION_CAP_RX_PUSH |
DR_STE_CTX_ACTION_CAP_RX_ENCAP,
.set_actions_rx = &dr_ste_v1_set_actions_rx,
.set_actions_tx = &dr_ste_v1_set_actions_tx,
.set_action_set = &dr_ste_v1_set_action_set,
Expand Down
1 change: 1 addition & 0 deletions providers/mlx5/mlx5dv_dr.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -125,6 +125,7 @@ enum dr_ste_ctx_action_cap {
DR_STE_CTX_ACTION_CAP_NONE = 0,
DR_STE_CTX_ACTION_CAP_TX_POP = 1 << 0,
DR_STE_CTX_ACTION_CAP_RX_PUSH = 1 << 1,
DR_STE_CTX_ACTION_CAP_RX_ENCAP = 1 << 3,
};

enum {
Expand Down

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