Add ftdi_bridge repo

LinHuangnan · Aug 17, 2019 · d6a44c5 · d6a44c5
1 parent 909a635
commit d6a44c5
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Showing 3 changed files with 6 additions and 1 deletion.
diff --git a/.gitmodules b/.gitmodules
@@ -19,3 +19,6 @@
 [submodule "dbg_bridge"]
 	path = dbg_bridge
 	url = https://github.com/ultraembedded/core_dbg_bridge
+[submodule "ftdi_bridge"]
+	path = ftdi_bridge
+	url = https://github.com/ultraembedded/core_ftdi_bridge.git
diff --git a/README.md b/README.md
@@ -17,7 +17,8 @@ git clone --recursive https://github.com/ultraembedded/cores.git
 | ---- | ------------- |
 | asram16_axi4 | AXI4 -> Async SRAM (16-bit) Interface |
 | dbg_bridge | UART -> AXI4 Debug Bridge |
-| ftdi_async_bridge | FTDI Asynchronous FIFO Interface |
+| ftdi_async_bridge | FTDI Asynchronous FIFO Interface (Wishbone) |
+| ftdi_bridge | FTDI Asynchronous/Synchronous FIFO Interface (AXI-4) |
 | i2s | I2S Master |
 | irq_ctrl | Simple Linux support interrupt controller |
 | sdram | Simple SDRAM Controller (Wishbone) |

diff --git a/ftdi_bridge b/ftdi_bridge