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/ ____/ ____/ __ \/ | / __ )___ ____ _____/ /_
/ / / / __/ /_/ / /| |______/ __ / _ \/ __ \/ ___/ __ \
/ /___/ /_/ / _, _/ ___ /_____/ /_/ / __/ / / / /__/ / / /
\____/\____/_/ |_/_/ |_| /_____/\___/_/ /_/\___/_/ /_/
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Applications from different domains for CGRA acceleration. The compiler for this benchmark can be found here.
- Cheng Tan, et al. “DynPaC: Coarse-Grained, Dynamic, and Partially Reconfigurable Array for Streaming Applications.” The 39th IEEE International Conference on Computer Design. (ICCD'21), Oct 2021.
- Cheng Tan, et al. “OpenCGRA: Democratizing Coarse-Grained Reconfigurable Arrays.” The 32nd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP'21), A Virtual Conference, July 7-8, 2021.
- Cheng Tan, et al. "ARENA: Asynchronous Reconfigurable Accelerator Ring to Enable Data-Centric Parallel Computing." IEEE Transactions on Parallel and Distributed Systems (TPDS'21). Repo
- Cheng Tan, et al. “AURORA: Automated Refinement of Coarse-Grained Reconfigurable Accelerators.” The 2021 Design, Automation & Test in Europe Conference, Grenoble, France. (DATE'21) February 1-5, 2021.
- Cheng Tan, et al. "OpenCGRA: An Open-Source Framework for Modeling, Testing, and Evaluating CGRAs." The 38th IEEE International Conference on Computer Design. (ICCD'20), Oct 2020. Repo.
CGRA-Benchmark is offered under the terms of the Open Source Initiative BSD 3-Clause License. More information about this license can be found here: