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[Dependabot]: Bump neorv32 from 46baf5a to 082146d
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Bumps [neorv32](https://github.com/stnolting/neorv32) from `46baf5a` to `082146d`.
- [Release notes](https://github.com/stnolting/neorv32/releases)
- [Commits](stnolting/neorv32@46baf5a...082146d)

---
updated-dependencies:
- dependency-name: neorv32
  dependency-type: direct:production
...

Signed-off-by: dependabot[bot] <[email protected]>
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dependabot[bot] authored Mar 17, 2024
1 parent 674e220 commit ec2a63e
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion neorv32
Submodule neorv32 updated 55 files
+9 −4 CHANGELOG.md
+14 −13 CODE_OF_CONDUCT.md
+5 −4 CONTRIBUTING.md
+9 −7 README.md
+6 −21 docs/README.md
+9 −7 docs/datasheet/cpu.adoc
+3 −3 docs/datasheet/cpu_csr.adoc
+1 −1 docs/datasheet/on_chip_debugger.adoc
+3 −4 docs/datasheet/overview.adoc
+33 −36 docs/datasheet/soc.adoc
+11 −18 docs/datasheet/soc_dcache.adoc
+1 −1 docs/datasheet/soc_dma.adoc
+13 −23 docs/datasheet/soc_icache.adoc
+37 −36 docs/datasheet/soc_sysinfo.adoc
+0 −124 docs/datasheet/soc_wishbone.adoc
+142 −0 docs/datasheet/soc_xbus.adoc
+12 −12 docs/datasheet/soc_xip.adoc
+13 −9 docs/datasheet/software.adoc
+16 −35 docs/figures/license.md
+ docs/figures/neorv32_bus.png
+ docs/figures/neorv32_processor.png
+ docs/figures/wishbone_classic_read.png
+ docs/figures/wishbone_pipelined_write.png
+10 −12 docs/sources/wishbone_classic_read.json
+10 −12 docs/sources/wishbone_pipelined_write.json
+1 −1 docs/userguide/adding_custom_hw_modules.adoc
+1 −1 docs/userguide/application_specific_configuration.adoc
+1 −1 docs/userguide/litex_support.adoc
+8 −12 rtl/README.md
+1 −1 rtl/core/neorv32_application_image.vhd
+8 −8 rtl/core/neorv32_bootloader_image.vhd
+174 −111 rtl/core/neorv32_cache.vhd
+5 −5 rtl/core/neorv32_cpu.vhd
+0 −551 rtl/core/neorv32_dcache.vhd
+0 −561 rtl/core/neorv32_icache.vhd
+22 −23 rtl/core/neorv32_package.vhd
+66 −67 rtl/core/neorv32_sysinfo.vhd
+310 −261 rtl/core/neorv32_top.vhd
+41 −66 rtl/core/neorv32_xbus.vhd
+13 −342 rtl/core/neorv32_xip.vhd
+19 −24 rtl/system_integration/neorv32_SystemTop_AvalonMM.vhd
+20 −31 rtl/system_integration/neorv32_SystemTop_axi4lite.vhd
+39 −56 rtl/system_integration/neorv32_litex_core_complex.vhd
+7 −5 sim/README.md
+20 −24 sim/neorv32_tb.vhd
+24 −29 sim/simple/neorv32_tb.simple.vhd
+10 −27 sw/README.md
+3 −0 sw/common/neorv32.ld
+1 −1 sw/example/demo_xip/main.c
+1 −1 sw/example/processor_check/main.c
+1 −1 sw/lib/include/neorv32_cpu_csr.h
+27 −46 sw/lib/include/neorv32_sysinfo.h
+3 −3 sw/lib/source/neorv32_cpu.c
+62 −42 sw/lib/source/neorv32_rte.c
+15 −16 sw/svd/neorv32.svd

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