Flash Autodetect and Bootloader patching

- Added commands to autodetect flash size mimicking what esptool.py does. It is called automatically after the stub is run.

- Added bootloader patching on the fly of the flash parameters in the header bytes of the bootloader. In this iteration Flash Mode is always set to DIO and Flash Frequency to 40m. Flash Size is set to the autodetected value, if any, otherwise 4MB. The code checks for a magic bytes that indicate the image being flashed is a bootloader.

src/const.ts

@@ -6,7 +6,7 @@ export interface Logger {
   debug(msg: string, ...args: any[]): void;
 }
 export const baudRates = [921600, 115200, 230400, 460800];
-export const flashSizes = {
+export const FLASH_SIZES = {
   "512KB": 0x00,
   "256KB": 0x10,
   "1MB": 0x20,
@@ -18,10 +18,75 @@ export const flashSizes = {
   "16MB": 0x90,
 };
 
+export const ESP32_FLASH_SIZES = {
+  "1MB": 0x00,
+  "2MB": 0x10,
+  "4MB": 0x20,
+  "8MB": 0x30,
+  "16MB": 0x40,
+};
+
+export const FLASH_MODES = {
+  qio: 0,
+  qout: 1,
+  dio: 2,
+  dout: 3,
+};
+
+export const FLASH_FREQUENCIES = {
+  "40m": 0,
+  "26m": 1,
+  "20m": 2,
+  "80m": 0xf,
+};
+
+export const DETECTED_FLASH_SIZES = {
+  0x12: "256KB",
+  0x13: "512KB",
+  0x14: "1MB",
+  0x15: "2MB",
+  0x16: "4MB",
+  0x17: "8MB",
+  0x18: "16MB",
+  0x19: "32MB",
+  0x1a: "64MB",
+};
+
 export const FLASH_WRITE_SIZE = 0x400;
 export const STUB_FLASH_WRITE_SIZE = 0x4000;
 export const FLASH_SECTOR_SIZE = 0x1000; // Flash sector size, minimum unit of erase.
 export const ESP_ROM_BAUD = 115200;
+export const ESP32_BOOTLOADER_FLASH_OFFSET = 0x1000;
+export const BOOTLOADER_FLASH_OFFSET = 0x0;
+export const ESP_IMAGE_MAGIC = 0xe9;
+
+export const ESP32_SPI_REG_BASE = 0x3ff42000;
+export const ESP32_SPI_USR_OFFS = 0x1c;
+export const ESP32_SPI_USR1_OFFS = 0x20;
+export const ESP32_SPI_USR2_OFFS = 0x24;
+export const ESP32_SPI_MOSI_DLEN_OFFS = 0x28;
+export const ESP32_SPI_MISO_DLEN_OFFS = 0x2c;
+export const ESP32_SPI_W0_OFFS = 0x80;
+
+export const ESP8266_SPI_REG_BASE = 0x60000200;
+export const ESP8266_SPI_USR_OFFS = 0x1c;
+export const ESP8266_SPI_USR1_OFFS = 0x20;
+export const ESP8266_SPI_USR2_OFFS = 0x24;
+export const ESP8266_SPI_MOSI_DLEN_OFFS = -1;
+export const ESP8266_SPI_MISO_DLEN_OFFS = -1;
+export const ESP8266_SPI_W0_OFFS = 0x40;
+
+const UART_DATE_REG_ADDR = 0x60000078;
+
+export interface SpiFlashAddresses {
+  regBase: number;
+  usrOffs: number;
+  usr1Offs: number;
+  usr2Offs: number;
+  mosiDlenOffs: number;
+  misoDlenOffs: number;
+  w0Offs: number;
+}
 
 export const SYNC_PACKET = toByteArray(
   "\x07\x07\x12 UUUUUUUUUUUUUUUUUUUUUUUUUUUUUUUU"
@@ -86,3 +151,64 @@ export const timeoutPerMb = (secondsPerMb: number, sizeBytes: number) => {
   }
   return result;
 };
+
+export const getSpiFlashAddresses = (
+  chipFamily: ChipFamily
+): SpiFlashAddresses => {
+  switch (chipFamily) {
+    case CHIP_FAMILY_ESP32:
+      return {
+        regBase: ESP32_SPI_REG_BASE,
+        usrOffs: ESP32_SPI_USR_OFFS,
+        usr1Offs: ESP32_SPI_USR1_OFFS,
+        usr2Offs: ESP32_SPI_USR2_OFFS,
+        mosiDlenOffs: ESP32_SPI_MOSI_DLEN_OFFS,
+        misoDlenOffs: ESP32_SPI_MISO_DLEN_OFFS,
+        w0Offs: ESP32_SPI_W0_OFFS,
+      };
+    case CHIP_FAMILY_ESP32S2:
+      return {
+        regBase: ESP32_SPI_REG_BASE,
+        usrOffs: ESP32_SPI_USR_OFFS,
+        usr1Offs: ESP32_SPI_USR1_OFFS,
+        usr2Offs: ESP32_SPI_USR2_OFFS,
+        mosiDlenOffs: ESP32_SPI_MOSI_DLEN_OFFS,
+        misoDlenOffs: ESP32_SPI_MISO_DLEN_OFFS,
+        w0Offs: ESP32_SPI_W0_OFFS,
+      };
+    case CHIP_FAMILY_ESP8266:
+      return {
+        regBase: ESP8266_SPI_REG_BASE,
+        usrOffs: ESP8266_SPI_USR_OFFS,
+        usr1Offs: ESP8266_SPI_USR1_OFFS,
+        usr2Offs: ESP8266_SPI_USR2_OFFS,
+        mosiDlenOffs: ESP8266_SPI_MOSI_DLEN_OFFS,
+        misoDlenOffs: ESP8266_SPI_MISO_DLEN_OFFS,
+        w0Offs: ESP8266_SPI_W0_OFFS,
+      };
+    default:
+      return {
+        regBase: -1,
+        usrOffs: -1,
+        usr1Offs: -1,
+        usr2Offs: -1,
+        mosiDlenOffs: -1,
+        misoDlenOffs: -1,
+        w0Offs: -1,
+      };
+  }
+};
+
+export const getUartDateRegAddress = (chipFamily: ChipFamily): number => {
+  // Additional chips like S3 or C6 have different addresses
+  switch (chipFamily) {
+    case CHIP_FAMILY_ESP32:
+      return UART_DATE_REG_ADDR;
+    case CHIP_FAMILY_ESP32S2:
+      return UART_DATE_REG_ADDR;
+    case CHIP_FAMILY_ESP8266:
+      return UART_DATE_REG_ADDR;
+    default:
+      return -1;
+  }
+};