Merge pull request YosysHQ#313 from YosysHQ/gatecat/bram-doc-update

Update BRAM NegClk info based on latest testing
RCoeurjoly · Dec 12, 2023 · 1a40ae7 · 1a40ae7
2 parents d20a5e9 + cfc6e9f
commit 1a40ae7
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/docs/ram_tile.html b/docs/ram_tile.html
@@ -91,8 +91,8 @@ <h2>Block RAM Resources</h2>
 </table>
 
 <p>
-The <span style="font-family:monospace">NegClk</span> bit in the RAMB tile negates the polarity of the <span style="font-family:monospace">WCLK</span> port,
-and the <span style="font-family:monospace">NegClk</span> bit in the RAMT  tile negates the polarity of the <span style="font-family:monospace">RCLK</span> port.
+The <span style="font-family:monospace">NegClk</span> bit in the RAMB tile (1k die) or RAMT tile (other devices) negates the polarity of the <span style="font-family:monospace">WCLK</span> port,
+and the <span style="font-family:monospace">NegClk</span> bit in the RAMT (1k die) or RAMB tile (other devices) tile negates the polarity of the <span style="font-family:monospace">RCLK</span> port.
 </p>
 
 <p>