Add logging library and correct ADC initialization

Cargo.toml

@@ -6,13 +6,14 @@ version = "0.1.0"
 [dependencies]
 bare-metal = "0.1.0"
 cortex-m = "0.3.1"
+cortex-m-semihosting = "0.2.0"
 vcell = "0.1.0"
 
 [dependencies.cortex-m-rt]
 features = ["abort-on-panic"]
 version = "0.3.3"
 
 [dependencies.stm32f40x]
+features = ["rt"]
 optional = false
-features = ['rt']
 path = "../stm32f40x"

src/gpio.rs

@@ -144,46 +144,55 @@ enum ADC_TwoSampleDelay {
     ADC_TwoSamplingDelay_20Cycles
 }
 
+///
+/// TODO:
+///  - Implement other ADC options supported
+///    in stm32f4xx_adc.c
+///
+/// NOTE: All of these `unsafe` blocks are actually
+/// safe, since they are atomic writes.
 pub fn initialize_adcs(c_adc: &C_ADC, adc1: &ADC1) {
     let adc_mode = ADC_Mode::ADC_Mode_Independent;
-    adc_mode = match adc_mode {
+    let adc_mode = match adc_mode {
         ADC_Mode::ADC_Mode_Independent => 0x00,
         _ => 0xFF // Not implemented yet.
     };
     let adc_prescale = ADC_Prescaler::ADC_Prescaler_Div2;
-    adc_prescale = match adc_prescale {
+    let adc_prescale = match adc_prescale {
         ADC_Prescaler::ADC_Prescaler_Div2 => 0x00,
         ADC_Prescaler::ADC_Prescaler_Div4 => 0x01,
         ADC_Prescaler::ADC_Prescaler_Div6 => 0x02,
         ADC_Prescaler::ADC_Prescaler_Div8 => 0x03
     };
     let adc_dma = ADC_DMAMode::ADC_DMAAccessMode_Disabled;
-    adc_dma = match adc_dma {
+    let adc_dma = match adc_dma {
         ADC_DMAMode::ADC_DMAAccessMode_Disabled => 0x00,
         _ => 0xFF // Not implemented yet.
     };
     let adc_twosample = ADC_TwoSampleDelay::ADC_TwoSamplingDelay_5Cycles;
-    adc_twosample = match adc_twosample {
+    let adc_twosample = match adc_twosample {
         ADC_TwoSampleDelay::ADC_TwoSamplingDelay_5Cycles => 0x00,
         _ => 0xFF // Not implemented yet.
     };
-    c_adc.ccr.write(|w| w.mult.bits(adc_mode));
-    c_adc.ccr.write(|w| w.adcpre.bits(adc_prescale));
-    c_adc.ccr.write(|w| w.dma.bits(adc_dma));
-    c_adc.ccr.write(|w| w.delay.bits(adc_twosample));
+    unsafe {
+        c_adc.ccr.write(|w| w.mult().bits(adc_mode));
+        c_adc.ccr.write(|w| w.adcpre().bits(adc_prescale));
+        c_adc.ccr.write(|w| w.dma().bits(adc_dma));
+        c_adc.ccr.write(|w| w.delay().bits(adc_twosample));
+    }
 
     // ADC1 Initialization
     unsafe {
         let rcc = &(*RCC.get());
         rcc.apb2enr.write(|w| w.adc1en().set_bit());
+        adc1.cr1.write(|w| w.res().bits(0x00)); 
     }
-    adc1.cr1.write(|w| w.res().bits());
-    adc1.cr1.write(|w| w.scan().bits());
+    adc1.cr1.write(|w| w.scan().clear_bit());
     // Clear all relevant bits in cr2
     let cr2_clear_mask = 0xC0FFF7FD;
     unsafe { adc1.cr2.modify(|r, w| w.bits(r.bits() & cr2_clear_mask)); }
     let sqr1_clear_mask = 0xFF0FFFFF; 
-    adc1.sqr1.modify(|r, w| w.bits(r.bits() & sqr1_clear_mask);
+    unsafe { adc1.sqr1.modify(|r, w| w.bits(r.bits() & sqr1_clear_mask)); }
 
     // Turn ADC 1 On
     adc1.cr2.write(|w| w.adon().set_bit());

src/lib.rs

@@ -3,5 +3,7 @@
 #![macro_use]
 pub extern crate stm32f40x;
 extern crate cortex_m;
+extern crate cortex_m_semihosting;
 
 pub mod gpio;
+pub mod logger;

src/logger.rs

@@ -0,0 +1,32 @@
+use core::fmt::Write;
+use core::fmt;
+use cortex_m_semihosting::hio;
+
+pub enum LogLevel {
+    l_info,
+    l_warn,
+    l_error,
+    l_fatal
+}
+
+#[macro_export]
+macro_rules! logger {
+    ($level:expr, $($arg:tt)*) => {
+        let mut stdout = hio::hstdout().unwrap();
+        let log_color = match $level {
+            LogLevel::l_info => "\x1b[00;36m",
+            LogLevel::l_warn => "\x1b[00;33m",
+            LogLevel::l_error => "\x1b[00;31m",
+            LogLevel::l_fatal => "\x1b[37;41m"
+        };
+        let log_name = match $level {
+            LogLevel::l_info => "INFO",
+            LogLevel::l_warn => "WARN",
+            LogLevel::l_error => "ERROR",
+            LogLevel::l_fatal => "FATAL",
+        };
+        stdout.write_fmt(format_args!("{}{} |\t\t", log_color, log_name));
+        stdout.write_fmt(format_args!($($arg)*));
+        stdout.write_fmt(format_args!("\n"));
+    };
+}