drm/amd/display: Optimize passive update planes.

[Why] passive update planes still spends a litte more time on some cases. [How] Remove unnecessary trace which involving in some register read. Disable debug output for release build. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Simiil · Dec 18, 2018 · c2c2ce1 · c2c2ce1
1 parent 1ae62f3
commit c2c2ce1
Showing 1 changed file with 0 additions and 3 deletions.
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1570,9 +1570,6 @@ static void commit_planes_for_stream(struct dc *dc,
 		}
 	}
 
-	if (update_type == UPDATE_TYPE_FULL)
-		context_timing_trace(dc, &context->res_ctx);
-
 	// Update Type FAST, Surface updates
 	if (update_type == UPDATE_TYPE_FAST) {
 		/* Lock the top pipe while updating plane addrs, since freesync requires