Spelling fixes (larry doolittle)

cadpli/configure.in

@@ -37,7 +37,7 @@ AC_SUBST(DLLIB)
 
 AX_CPP_PRECOMP
 
-# Compiler option for position independent code, needed whan making shared objects.
+# Compiler option for position independent code, needed when making shared objects.
 AX_C_PICFLAG
 
 # Linker option used when compiling the target

configure.in

@@ -93,7 +93,7 @@ AC_C_BIGENDIAN
 
 AX_LD_EXTRALIBS
 
-# Compiler option for position independent code, needed whan making shared objects.
+# Compiler option for position independent code, needed when making shared objects.
 # CFLAGS inherited by cadpli/Makefile?
 AX_C_PICFLAG
 

driver/iverilog.man

@@ -1,4 +1,4 @@
-.TH iverilog 1 "$Date: 2006/09/28 04:35:18 $" Version "$Date: 2006/09/28 04:35:18 $"
+.TH iverilog 1 "$Date: 2007/02/26 19:49:49 $" Version "$Date: 2007/02/26 19:49:49 $"
 .SH NAME
 iverilog - Icarus Verilog compiler
 
@@ -62,7 +62,7 @@ Enable (default) or disable specify block support. When enabled,
 specify block code is elaborated. When disabled, specify blocks are
 parsed but ignored. Specify blocks are commonly not needed for RTL
 simulation, and in fact can hurt performance of the
-simulation. However, disabling specify blocks reduces acuracy of
+simulation. However, disabling specify blocks reduces accuracy of
 full-timing simulations.
 .TP 8
 .B -gxtypes\fI|\fP-gno-xtypes

elab_net.cc

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: elab_net.cc,v 1.198 2007/02/05 01:42:31 steve Exp $"
+#ident "$Id: elab_net.cc,v 1.199 2007/02/26 19:49:48 steve Exp $"
 #endif
 
 # include "config.h"
@@ -2705,8 +2705,8 @@ NetNet* PETernary::elaborate_net(Design*des, NetScope*scope,
 
 	/* If the MUX device results is too narrow to fill out the
 	   desired result, then pad it. It is OK to have a too-narrow
-	   result here because the dwidth choise is >= the width of
-	   both alternatives. Thus, padding here is equivilent to
+	   result here because the dwidth choice is >= the width of
+	   both alternatives. Thus, padding here is equivalent to
 	   padding inside, and is cheaper. */
       if (dwidth < width)
 	    sig = pad_to_width(des, sig, width);
@@ -2909,6 +2909,9 @@ NetNet* PEUnary::elaborate_net(Design*des, NetScope*scope,
 
 /*
  * $Log: elab_net.cc,v $
+ * Revision 1.199  2007/02/26 19:49:48  steve
+ *  Spelling fixes (larry doolittle)
+ *
  * Revision 1.198  2007/02/05 01:42:31  steve
  *  Set some missing local flags.
  *

ivl_target.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: ivl_target.h,v 1.177 2007/02/25 23:08:24 steve Exp $"
+#ident "$Id: ivl_target.h,v 1.178 2007/02/26 19:49:49 steve Exp $"
 #endif
 
 # include  <inttypes.h>
@@ -1343,7 +1343,7 @@ extern ivl_expr_t  ivl_parameter_expr(ivl_parameter_t net);
  * ivl_scope_def
  *    Task definition scopes carry a task definition, in the form of
  *    a statement. This method accesses that definition. The
- *    ivl_scope_def function must return a statment for scopes that
+ *    ivl_scope_def function must return a statement for scopes that
  *    are type FUNCTION or TASK, and most return nil otherwise.
  *
  * ivl_scope_event
@@ -1654,8 +1654,8 @@ extern ivl_statement_type_t ivl_statement_type(ivl_statement_t net);
  * - IVL_ST_DELAY, IVL_ST_DELAYX
  * These statement types are delay statements. They are a way to
  * attach a delay to a statement. The ivl_stmt_sub_stmt() function
- * gets the statment to be executed after the delay. If this an
- * ivl_ST_DELAY, then the ivl_stmt_delay_val function gets the
+ * gets the statement to be executed after the delay. If this is
+ * IVL_ST_DELAY, then the ivl_stmt_delay_val function gets the
  * constant delay. If this is IVL_ST_DELAYX, then the
  * ivl_stmt_delay_expr gets the expression of the delay. In this case,
  * the expression is not necessarily constant.
@@ -1768,6 +1768,9 @@ _END_DECL
 
 /*
  * $Log: ivl_target.h,v $
+ * Revision 1.178  2007/02/26 19:49:49  steve
+ *  Spelling fixes (larry doolittle)
+ *
  * Revision 1.177  2007/02/25 23:08:24  steve
  *  Process Verilog escape sequences much earlier.
  *

libveriuser/configure.in

@@ -23,7 +23,7 @@ AC_CHECK_SIZEOF(unsigned)
 # may modify CPPFLAGS and CFLAGS
 AX_CPP_PRECOMP
 
-# Compiler option for position independent code, needed whan making shared objects.
+# Compiler option for position independent code, needed when making shared objects.
 AX_C_PICFLAG
 
 AC_SUBST(EXEEXT)

netmisc.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: netmisc.h,v 1.27 2007/01/16 05:44:15 steve Exp $"
+#ident "$Id: netmisc.h,v 1.28 2007/02/26 19:49:49 steve Exp $"
 #endif
 
 # include  "netlist.h"
@@ -87,7 +87,7 @@ extern NetNet*add_to_net(Design*des, NetNet*sig, long val);
  * where order matters.
  *
  * make_add_expr
- *   Make a NetEBAdd expresion with <expr> the first argument and
+ *   Make a NetEBAdd expression with <expr> the first argument and
  *   <val> the second. This may get turned into a subtract if <val> is
  *   less then zero. If val is exactly zero, then return <expr> as is.
  *
@@ -120,6 +120,9 @@ extern NetExpr* elab_and_eval(Design*des, NetScope*scope,
 
 /*
  * $Log: netmisc.h,v $
+ * Revision 1.28  2007/02/26 19:49:49  steve
+ *  Spelling fixes (larry doolittle)
+ *
  * Revision 1.27  2007/01/16 05:44:15  steve
  *  Major rework of array handling. Memories are replaced with the
  *  more general concept of arrays. The NetMemory and NetEMemory

solaris/README-solaris_pkg.txt

@@ -1,8 +1,8 @@
-# $Id: README-solaris_pkg.txt,v 1.2 2004/10/04 01:10:56 steve Exp $
+# $Id: README-solaris_pkg.txt,v 1.3 2007/02/26 19:49:49 steve Exp $
 
 Notes about the solaris package.
 
-I.  Installing a prebuild solaris package
+I.  Installing a prebuilt solaris package
 -----------------------------------------
 
 To install the solaris package do the following as root on your machine:
@@ -24,10 +24,10 @@ To install the solaris package do the following as root on your machine:
    this will install the package.  The package will be registered under the
    name "IVLver"
 
-II.  Deinstalling the solaris package
+II.  Uninstalling the solaris package
 -------------------------------------
 
-To deinstall an installed solaris package do the following as root on your machine:
+To uninstall an installed solaris package do the following as root on your machine:
 
     pkgrm IVLver
 

tgt-fpga/configure.in

@@ -17,7 +17,7 @@ AC_CHECK_HEADERS(malloc.h)
 # may modify CPPFLAGS and CFLAGS
 AX_CPP_PRECOMP
 
-# Compiler option for position independent code, needed whan making shared objects.
+# Compiler option for position independent code, needed when making shared objects.
 AX_C_PICFLAG
 
 # linker options when building a shared library

tgt-fpga/device.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: device.h,v 1.14 2003/11/12 03:20:14 steve Exp $"
+#ident "$Id: device.h,v 1.15 2007/02/26 19:49:49 steve Exp $"
 #endif
 
 # include  <ivl_target.h>
@@ -72,14 +72,17 @@ struct device_s {
  * Return the device_t cookie given the name of the architecture. If
  * the device is not found, return 0.
  *
- * This function is used if the user specifies the archetecture
+ * This function is used if the user specifies the architecture
  * explicitly, with the -parch=name flag.
  */
 extern device_t device_from_arch(const char*arch);
 
 
 /*
  * $Log: device.h,v $
+ * Revision 1.15  2007/02/26 19:49:49  steve
+ *  Spelling fixes (larry doolittle)
+ *
  * Revision 1.14  2003/11/12 03:20:14  steve
  *  devices need show_cmp_gt
  *

tgt-fpga/edif.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: edif.h,v 1.7 2003/09/03 23:34:09 steve Exp $"
+#ident "$Id: edif.h,v 1.8 2007/02/26 19:49:49 steve Exp $"
 #endif
 
 # include  <stdio.h>
@@ -47,7 +47,7 @@
  *
  *   Declare external libraries with edif_xlibrary_create
  *     Normally, this is the single technology library that contains
- *     the primitive cells that the code generator intendes to
+ *     the primitive cells that the code generator intends to
  *     use. The library is given a name, such as VIRTEX or whatever
  *     the implementation tools expect. Cells are attached to the
  *     library later. An edif netlist may include multiple external
@@ -196,7 +196,7 @@ extern edif_cellref_t edif_cellref_create(edif_t edf, edif_cell_t cell);
 
 /* Instances can have properties attached to them. The name and value
    given here are turned into a (property <name> (string "val"))
-   sexpression attached to the instance.
+   expression attached to the instance.
 
    Examples of string properties commonly attached to cellref devices
    include such things as the INIT=<value> to initialize LUT cells in
@@ -231,6 +231,9 @@ extern void edif_print(FILE*fd, edif_t design);
 
 /*
  * $Log: edif.h,v $
+ * Revision 1.8  2007/02/26 19:49:49  steve
+ *  Spelling fixes (larry doolittle)
+ *
  * Revision 1.7  2003/09/03 23:34:09  steve
  *  Support synchronous set of LPM_FF devices.
  *

tgt-fpga/xilinx.c

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: xilinx.c,v 1.12 2004/02/15 18:03:30 steve Exp $"
+#ident "$Id: xilinx.c,v 1.13 2007/02/26 19:49:50 steve Exp $"
 #endif
 
 # include  "edif.h"
@@ -273,7 +273,7 @@ edif_cell_t xilinx_cell_xorcy(edif_xlibrary_t xlib)
 
 /*
  * This function does a lot of the stuff common to the header
- * functions of various Xilinx familes. This includes creating the edf
+ * functions of various Xilinx families. This includes creating the edf
  * object that holds the netlist.
  */
 void xilinx_common_header(ivl_design_t des)
@@ -835,14 +835,14 @@ void xilinx_shiftl(ivl_lpm_t net)
 
 	/* Allocate a matrix of edif_cellref_t variables. A devices
 	   will be addressed by the expression table[sdx][qdx];
-	   This should make the algorighm code easier to read. */
+	   This should make the algorithm code easier to read. */
       cells = calloc(nsel * width, sizeof(edif_cellref_t));
       table = calloc(nsel, sizeof(edif_cellref_t*));
 
       for (sdx = 0 ;  sdx < nsel ;  sdx += 1)
 	    table[sdx] = cells + sdx*width;
 
-	/* Make a 0 valued pad bit. I wlil use this for all the shifin
+	/* Make a 0 valued pad bit. I will use this for all the shift in
 	   values that are beyond the input. */
       pad0_cell = edif_cellref_create(edf, cell_0);
       pad0 = edif_joint_create(edf);
@@ -951,6 +951,9 @@ void xilinx_shiftl(ivl_lpm_t net)
 
 /*
  * $Log: xilinx.c,v $
+ * Revision 1.13  2007/02/26 19:49:50  steve
+ *  Spelling fixes (larry doolittle)
+ *
  * Revision 1.12  2004/02/15 18:03:30  steve
  *  Cleanup of warnings.
  *

tgt-fpga/xilinx.h

@@ -19,13 +19,13 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: xilinx.h,v 1.8 2003/08/15 02:23:53 steve Exp $"
+#ident "$Id: xilinx.h,v 1.9 2007/02/26 19:49:50 steve Exp $"
 #endif
 
 /*
  * This header file includes XILINX library support functions. They
  * manage the creation and reference of cells from the library. Use
- * the xililx_cell_* functions to get an edif_cell_t from the
+ * the xilinx_cell_* functions to get an edif_cell_t from the
  * library. The function will create the cell in the library if
  * needed, or will return the existing cell if it was already called.
  */
@@ -130,6 +130,9 @@ extern void xilinx_shiftl(ivl_lpm_t net);
 
 /*
  * $Log: xilinx.h,v $
+ * Revision 1.9  2007/02/26 19:49:50  steve
+ *  Spelling fixes (larry doolittle)
+ *
  * Revision 1.8  2003/08/15 02:23:53  steve
  *  Add synthesis support for synchronous reset.
  *

tgt-pal/fit_log.c

@@ -17,7 +17,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: fit_log.c,v 1.5 2002/08/12 01:35:03 steve Exp $"
+#ident "$Id: fit_log.c,v 1.6 2007/02/26 19:49:50 steve Exp $"
 #endif
 
 # include "config.h"
@@ -29,7 +29,7 @@
 # include  "priv.h"
 
 /*
- * By the time we get here, all the flip-flops iave been placed in
+ * By the time we get here, all the flip-flops have been placed in
  * macrocells, and enables attached to them. So all that's left is to
  * work backwards from each macrocell, making terms and sum-of-terms
  * from the asynchronous logic until we get to the table inputs.
@@ -128,6 +128,9 @@ int fit_logic(void)
 
 /*
  * $Log: fit_log.c,v $
+ * Revision 1.6  2007/02/26 19:49:50  steve
+ *  Spelling fixes (larry doolittle)
+ *
  * Revision 1.5  2002/08/12 01:35:03  steve
  *  conditional ident string using autoconfig.
  *

tgt-pal/priv.h

@@ -19,7 +19,7 @@
  *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  */
 #ifdef HAVE_CVS_IDENT
-#ident "$Id: priv.h,v 1.7 2002/08/12 01:35:03 steve Exp $"
+#ident "$Id: priv.h,v 1.8 2007/02/26 19:49:50 steve Exp $"
 #endif
 
 # include  <ivl_target.h>
@@ -88,7 +88,7 @@ extern struct pal_bind_s* bind_pin;
 
 
 /*
- * These are various stepps in the fitting process.
+ * These are various steps in the fitting process.
  */
 extern int get_pad_bindings(ivl_scope_t net, void*x);
 
@@ -102,6 +102,9 @@ extern int emit_jedec(const char*path);
 
 /*
  * $Log: priv.h,v $
+ * Revision 1.8  2007/02/26 19:49:50  steve
+ *  Spelling fixes (larry doolittle)
+ *
  * Revision 1.7  2002/08/12 01:35:03  steve
  *  conditional ident string using autoconfig.
  *

tgt-stub/configure.in

@@ -15,7 +15,7 @@ AX_WIN32
 # may modify CPPFLAGS and CFLAGS
 AX_CPP_PRECOMP
 
-# Compiler option for position independent code, needed whan making shared objects.
+# Compiler option for position independent code, needed when making shared objects.
 AX_C_PICFLAG
 
 # linker options when building a shared library