Using maskrom as first stage bootloader

Makefile

@@ -45,7 +45,7 @@ $(ROCKET_VERILOG): $(ROCKET_FIRRTL)
 	mkdir -p $(ROCKET_BUILD)
 	$(ROCKET_JAVA) "runMain firrtl.stage.FirrtlMain	\
 					-td $(ROCKET_BUILD) --infer-rw $(ROCKET_TOP) \
-					--repl-seq-mem -c:$(ROCKET_TOP):-o:$(ROCKET_BUILD)/$(ROCKET_OUTPUT).rom.conf \
+					--repl-seq-mem -c:$(ROCKET_TOP):-o:$(ROCKET_BUILD)/$(ROCKET_OUTPUT).sram.conf \
 					-faf $(ROCKET_BUILD)/$(ROCKET_OUTPUT).anno.json \
 					-fct firrtl.passes.InlineInstances \
 					-i $< -o $@ -X verilog"
@@ -58,14 +58,23 @@ verilog: $(ROCKET_VERILOG)
 #
 #######################################
 
+FIRMWARE_SRC	:= $(TOP)/firmware
+FIRMWARE_BUILD	:= $(BUILD)/firmware
+FSBL_SRC		:= $(FIRMWARE_SRC)/fsbl
+FSBL_BUILD		:= $(FIRMWARE_BUILD)/fsbl
+STARSHIP_ROM_HEX := $(FSBL_BUILD)/sdboot.hex
+
 BOARD				:= vc707
 SCRIPT_SRC			:= $(SRC)/fpga-shells
 VIVADO_SRC			:= $(SCRIPT_SRC)/xilinx
 VIVADO_BUILD		:= $(BUILD)/vivado
 VIVADO_BITSTREAM 	:= $(VIVADO_BUILD)/$(ROCKET_OUTPUT).bit
 VERILOG_SRAM		:= $(ROCKET_BUILD)/$(ROCKET_OUTPUT).behav_srams.v
+VERILOG_ROM			:= $(ROCKET_BUILD)/$(ROCKET_OUTPUT).rom.v
 VERILOG_INCLUDE 	:= $(VIVADO_BUILD)/$(ROCKET_OUTPUT).vsrc.f
 VERILOG_SRC			:= $(VERILOG_SRAM) \
+					   $(VERILOG_ROM) \
+					   $(STARSHIP_ROM_HEX) \
 					   $(ROCKET_BUILD)/$(ROCKET_OUTPUT).v \
 					   $(ROCKET_BUILD)/plusarg_reader.v \
 					   $(VIVADO_SRC)/$(BOARD)/vsrc/sdio.v \
@@ -76,9 +85,15 @@ $(VERILOG_INCLUDE):
 	echo $(VERILOG_SRC) > $@
 
 $(VERILOG_SRAM):
-	$(ROCKET_SRC)/scripts/vlsi_mem_gen $(ROCKET_BUILD)/$(ROCKET_OUTPUT).rom.conf >> $@
+	$(ROCKET_SRC)/scripts/vlsi_mem_gen $(ROCKET_BUILD)/$(ROCKET_OUTPUT).sram.conf >> $@
+
+$(STARSHIP_ROM_HEX):
+	$(MAKE) -C $(FSBL_SRC) PBUS_CLK=$(ROCKET_FREQ)000000 ROOT_DIR=$(TOP) ROCKET_OUTPUT=$(ROCKET_OUTPUT) hex
+
+$(VERILOG_ROM): $(STARSHIP_ROM_HEX)
+	$(ROCKET_SRC)/scripts/vlsi_rom_gen $(ROCKET_BUILD)/$(ROCKET_OUTPUT).rom.conf $< > $@
 
-$(VIVADO_BITSTREAM): $(ROCKET_VERILOG) $(VERILOG_INCLUDE) $(VERILOG_SRAM)
+$(VIVADO_BITSTREAM): $(ROCKET_VERILOG) $(VERILOG_INCLUDE) $(VERILOG_SRAM) $(VERILOG_ROM)
 	mkdir -p $(VIVADO_BUILD)
 	cd $(VIVADO_BUILD); vivado -mode batch -nojournal \
 		-source $(VIVADO_SRC)/common/tcl/vivado.tcl \

firmware/fsbl/.gitignore

@@ -0,0 +1 @@
+build/

fsbl/sdboot/Makefile → firmware/fsbl/Makefile

@@ -1,6 +1,6 @@
 # RISCV environment variable must be set
 ROOT_DIR	?=	$(dir $(abspath $(lastword $(MAKEFILE_LIST))))
-BUILD_DIR	:=	$(ROOT_DIR)/build/fsbl
+BUILD_DIR	:=	$(ROOT_DIR)/build/firmware/fsbl
 
 CC			=	$(RISCV)/bin/riscv64-unknown-elf-gcc
 OBJCOPY		=	$(RISCV)/bin/riscv64-unknown-elf-objcopy
@@ -14,12 +14,15 @@ PBUS_CLK ?= 1000000 # default to 1MHz but really should be overridden
 
 default: elf bin dump
 
-dtb	:= $(BUILD_DIR)/rocketchip.dtb
-dts	:= rocketchip.dts
+dtb		:= $(BUILD_DIR)/$(ROCKET_OUTPUT).dtb
+dts		:= $(BUILD_DIR)/$(ROCKET_OUTPUT).dts
+dts_org	:= $(ROOT_DIR)/build/rocket-chip/$(ROCKET_OUTPUT).dts
 
-$(dtb): $(dts)
+$(dtb): $(dts_org)
 	mkdir -p $(BUILD_DIR)
-	dtc -I dts -O dtb -o $@ $<
+	cp $< $(dts)
+	sed -i "s/clock-frequency = <0>/clock-frequency = <$(PBUS_CLK)>/g" $(dts)
+	dtc -I dts -O dtb -o $@ $(dts)
 
 elf := $(BUILD_DIR)/sdboot.elf
 $(elf): head.S kprintf.c sd.c $(dtb)
@@ -44,6 +47,13 @@ $(dump): $(elf)
 .PHONY: dump
 dump: $(dump)
 
+hex := $(BUILD_DIR)/sdboot.hex
+$(hex): $(bin)
+	od -t x4 -An -w4 -v $< > $@
+
+.PHONY: hex
+hex: $(hex)
+
 .PHONY: clean
 clean::
 	rm -rf $(BUILD_DIR)

fsbl/sdboot/linker/memory.lds → firmware/fsbl/linker/memory.lds

@@ -1,5 +1,5 @@
 MEMORY
 {
-  bootrom_mem (rx) : ORIGIN = 0x10000, LENGTH = 0x2000
+  bootrom_mem (rx) : ORIGIN = 0x20000, LENGTH = 0x2000
   memory_mem (rwx) : ORIGIN = 0x80000000, LENGTH = 0x40000000
 }

firmware/zsbl/.gitignore

@@ -0,0 +1 @@
+build/

firmware/zsbl/Makefile

@@ -0,0 +1,32 @@
+ROOT_DIR	?=	$(dir $(abspath $(lastword $(MAKEFILE_LIST))))
+BUILD_DIR	:=	$(ROOT_DIR)/build/firmware/zsbl
+
+GCC		=	riscv64-unknown-elf-gcc
+OBJCOPY	=	riscv64-unknown-elf-objcopy
+
+elf	:= $(BUILD_DIR)/bootrom.elf
+bin	:= $(BUILD_DIR)/bootrom.bin
+img	:= $(BUILD_DIR)/bootrom.img
+
+all: $(img)
+
+elf: $(elf)
+$(elf): bootrom.S linker.ld
+	mkdir -p $(BUILD_DIR)
+	$(GCC) -Tlinker.ld $< -nostdlib -static -Wl,--no-gc-sections -o $@
+
+bin:$(bin)
+$(bin): $(elf)
+	mkdir -p $(BUILD_DIR)
+	$(OBJCOPY) -O binary $< $@
+
+img:$(img)
+$(img): $(bin)
+	mkdir -p $(BUILD_DIR)
+	dd if=$< of=$@ bs=128 count=1
+
+
+
+
+
+

firmware/zsbl/bootrom.S

@@ -0,0 +1,10 @@
+#define ROM_BASE 0x20000
+
+.section .text.start, "ax", @progbits
+.globl _start
+_start:
+  csrwi 0x7c1, 0 // disable chicken bits
+  li s0, ROM_BASE
+  csrr a0, mhartid
+  li a1, 0
+  jr s0

firmware/zsbl/linker.ld

@@ -0,0 +1,7 @@
+SECTIONS
+{
+    START_ADDRESS = 0x10000; /* ... but actually position independent */
+
+    . = START_ADDRESS;
+    .text.start : { *(.text.start) }
+}

src/main/scala/FPGA/Configs.scala

@@ -30,6 +30,9 @@ class WithPeripherals extends Config((site, here, up) => {
     UARTParams(address = BigInt(0x64000000L)))
   case PeripherySPIKey => List(
     SPIParams(rAddress = BigInt(0x64001000L)))
+  case MaskROMLocated(x) => List(
+    MaskROMParams(BigInt(0x20000L), "StarshipROM")
+  )
 })
 
 class WithFrequency(MHz: Double) extends Config((site, here, up) => {
@@ -47,7 +50,6 @@ class StarshipFPGAConfig extends Config(
   new StarshipBaseConfig().alter((site,here,up) => {
     case DebugModuleKey => None
 
-    /* clock-frequency = 50MHz */
     case PeripheryBusKey => up(PeripheryBusKey, site).copy(dtsFrequency = Some(site(FPGAFrequencyKey).toInt * 1000000))
 
     /* timebase-frequency = 1 MHz */
@@ -59,13 +61,13 @@ class StarshipFPGAConfig extends Config(
       x.copy(master = x.master.copy(size = site(VCU707DDRSizeKey))))
 
     case BootROMLocated(x) => up(BootROMLocated(x), site).map { p =>
-      // invoke makefile for sdboot
+      // invoke makefile for zero stage boot
       val freqMHz = site(FPGAFrequencyKey).toInt * 1000000
       val path = System.getProperty("user.dir")
-      val make = s"make -C fsbl/sdboot PBUS_CLK=${freqMHz} ROOT_DIR=${path} bin"
+      val make = s"make -C firmware/zsbl ROOT_DIR=${path} img"
       println("[Leaving Starship] " + make)
       require (make.! == 0, "Failed to build bootrom")
-      p.copy(hang = 0x10000, contentFileName = s"build/fsbl/sdboot.bin")
+      p.copy(hang = 0x10000, contentFileName = s"build/firmware/zsbl/bootrom.img")
     }
   })
 )