[InstCombine] consolidate tests for ~(X+C); NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@341332 91177308-0d34-0410-b5e6-96231b3b80d8
Svengali · Sep 3, 2018 · 314d4c4 · 314d4c4
1 parent c4a79cd
commit 314d4c4
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Showing 3 changed files with 33 additions and 74 deletions.
diff --git a/test/Transforms/InstCombine/not.ll b/test/Transforms/InstCombine/not.ll
@@ -219,3 +219,36 @@ define <2 x i32> @not_sub_extra_use_vec(<2 x i32> %y, <2 x i32>* %p) {
   ret <2 x i32> %r
 }
 
+; ~(X + C) --> -X - C - 1 --> -(C + 1) - X
+
+define i32 @not_add(i32 %x) {
+; CHECK-LABEL: @not_add(
+; CHECK-NEXT:    [[R:%.*]] = sub i32 -124, [[X:%.*]]
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %a = add i32 %x, 123
+  %r = xor i32 %a, -1
+  ret i32 %r
+}
+
+define <2 x i32> @not_add_splat(<2 x i32> %x) {
+; CHECK-LABEL: @not_add_splat(
+; CHECK-NEXT:    [[R:%.*]] = sub <2 x i32> <i32 -124, i32 -124>, [[X:%.*]]
+; CHECK-NEXT:    ret <2 x i32> [[R]]
+;
+  %a = add <2 x i32> %x, <i32 123, i32 123>
+  %r = xor <2 x i32> %a, <i32 -1, i32 -1>
+  ret <2 x i32> %r
+}
+
+define <2 x i32> @not_add_vec(<2 x i32> %x) {
+; CHECK-LABEL: @not_add_vec(
+; CHECK-NEXT:    [[A:%.*]] = add <2 x i32> [[X:%.*]], <i32 42, i32 123>
+; CHECK-NEXT:    [[R:%.*]] = xor <2 x i32> [[A]], <i32 -1, i32 -1>
+; CHECK-NEXT:    ret <2 x i32> [[R]]
+;
+  %a = add <2 x i32> %x, <i32 42, i32 123>
+  %r = xor <2 x i32> %a, <i32 -1, i32 -1>
+  ret <2 x i32> %r
+}
+
diff --git a/test/Transforms/InstCombine/vector-xor.ll b/test/Transforms/InstCombine/vector-xor.ll
@@ -246,40 +246,6 @@ define <4 x i32> @test_v4i32_xor_signmask_sub_const_undef(<4 x i32> %a0) {
   ret <4 x i32> %2
 }
 
-; ~(X-C) --> (-C-1)-X
-
-define <4 x i32> @test_v4i32_not_signmask_sub_var_splatconst(<4 x i32> %a0) {
-; CHECK-LABEL: @test_v4i32_not_signmask_sub_var_splatconst(
-; CHECK-NEXT:    [[TMP1:%.*]] = sub <4 x i32> <i32 2, i32 2, i32 2, i32 2>, [[A0:%.*]]
-; CHECK-NEXT:    ret <4 x i32> [[TMP1]]
-;
-  %1 = sub <4 x i32> %a0, <i32  3, i32  3, i32  3, i32  3>
-  %2 = xor <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, %1
-  ret <4 x i32> %2
-}
-
-define <4 x i32> @test_v4i32_not_signmask_sub_var_const(<4 x i32> %a0) {
-; CHECK-LABEL: @test_v4i32_not_signmask_sub_var_const(
-; CHECK-NEXT:    [[TMP1:%.*]] = add <4 x i32> [[A0:%.*]], <i32 -3, i32 -5, i32 1, i32 -15>
-; CHECK-NEXT:    [[TMP2:%.*]] = xor <4 x i32> [[TMP1]], <i32 -1, i32 -1, i32 -1, i32 -1>
-; CHECK-NEXT:    ret <4 x i32> [[TMP2]]
-;
-  %1 = sub <4 x i32> %a0, <i32 3, i32 5, i32 -1, i32 15>
-  %2 = xor <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, %1
-  ret <4 x i32> %2
-}
-
-define <4 x i32> @test_v4i32_not_signmask_sub_var_const_undef(<4 x i32> %a0) {
-; CHECK-LABEL: @test_v4i32_not_signmask_sub_var_const_undef(
-; CHECK-NEXT:    [[TMP1:%.*]] = add <4 x i32> [[A0:%.*]], <i32 -3, i32 undef, i32 1, i32 -15>
-; CHECK-NEXT:    [[TMP2:%.*]] = xor <4 x i32> [[TMP1]], <i32 -1, i32 -1, i32 -1, i32 undef>
-; CHECK-NEXT:    ret <4 x i32> [[TMP2]]
-;
-  %1 = sub <4 x i32> %a0, <i32 3, i32 undef, i32 -1, i32 15>
-  %2 = xor <4 x i32> <i32 -1, i32 -1, i32 -1, i32 undef>, %1
-  ret <4 x i32> %2
-}
-
 ; (X + C) ^ signmask -> (X + C + signmask)
 
 define <4 x i32> @test_v4i32_xor_signmask_add_splatconst(<4 x i32> %a0) {

diff --git a/test/Transforms/InstCombine/xor.ll b/test/Transforms/InstCombine/xor.ll
@@ -157,46 +157,6 @@ define <2 x i1> @test12vec(<2 x i8> %a) {
   ret <2 x i1> %c
 }
 
-define i32 @test15(i32 %A) {
-; CHECK-LABEL: @test15(
-; CHECK-NEXT:    [[C:%.*]] = sub i32 0, %A
-; CHECK-NEXT:    ret i32 [[C]]
-;
-  %B = add i32 %A, -1
-  %C = xor i32 %B, -1
-  ret i32 %C
-}
-
-define <2 x i32> @test15vec(<2 x i32> %A) {
-; CHECK-LABEL: @test15vec(
-; CHECK-NEXT:    [[C:%.*]] = sub <2 x i32> zeroinitializer, [[A:%.*]]
-; CHECK-NEXT:    ret <2 x i32> [[C]]
-;
-  %B = add <2 x i32> %A, <i32 -1, i32 -1>
-  %C = xor <2 x i32> %B, <i32 -1, i32 -1>
-  ret <2 x i32> %C
-}
-
-define i32 @test16(i32 %A) {
-; CHECK-LABEL: @test16(
-; CHECK-NEXT:    [[C:%.*]] = sub i32 -124, %A
-; CHECK-NEXT:    ret i32 [[C]]
-;
-  %B = add i32 %A, 123
-  %C = xor i32 %B, -1
-  ret i32 %C
-}
-
-define <2 x i32> @test16vec(<2 x i32> %A) {
-; CHECK-LABEL: @test16vec(
-; CHECK-NEXT:    [[C:%.*]] = sub <2 x i32> <i32 -124, i32 -124>, [[A:%.*]]
-; CHECK-NEXT:    ret <2 x i32> [[C]]
-;
-  %B = add <2 x i32> %A, <i32 123, i32 123>
-  %C = xor <2 x i32> %B, <i32 -1, i32 -1>
-  ret <2 x i32> %C
-}
-
 define i32 @test18(i32 %A) {
 ; CHECK-LABEL: @test18(
 ; CHECK-NEXT:    [[C:%.*]] = add i32 %A, 124