Skip to content

Commit

Permalink
[mips] Make sure there is a chain edge dependency between loads that …
Browse files Browse the repository at this point in the history
…read

formal arguments on the stack and stores created afterwards. We need this to
ensure tail call optimized function calls do not write over the argument area
of the stack before it is read out.
 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194309 91177308-0d34-0410-b5e6-96231b3b80d8
  • Loading branch information
ahatanak committed Nov 9, 2013
1 parent ceb0d9c commit 9583022
Show file tree
Hide file tree
Showing 3 changed files with 25 additions and 10 deletions.
8 changes: 5 additions & 3 deletions lib/Target/Mips/MipsISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2650,9 +2650,11 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain,

// Create load nodes to retrieve arguments from the stack
SDValue FIN = DAG.getFrameIndex(FI, getPointerTy());
InVals.push_back(DAG.getLoad(ValVT, DL, Chain, FIN,
MachinePointerInfo::getFixedStack(FI),
false, false, false, 0));
SDValue Load = DAG.getLoad(ValVT, DL, Chain, FIN,
MachinePointerInfo::getFixedStack(FI),
false, false, false, 0);
InVals.push_back(Load);
OutChains.push_back(Load.getValue(1));
}
}

Expand Down
14 changes: 7 additions & 7 deletions test/CodeGen/Mips/i64arg.ll
Original file line number Diff line number Diff line change
Expand Up @@ -2,16 +2,16 @@

define void @f1(i64 %ll1, float %f, i64 %ll, i32 %i, float %f2) nounwind {
entry:
; CHECK: move $[[R1:[0-9]+]], $5
; CHECK: move $[[R0:[0-9]+]], $4
; CHECK: ori $6, ${{[0-9]+}}, 3855
; CHECK: ori $7, ${{[0-9]+}}, 22136
; CHECK: lw $25, %call16(ff1)
; CHECK-DAG: lw $[[R2:[0-9]+]], 80($sp)
; CHECK-DAG: lw $[[R3:[0-9]+]], 84($sp)
; CHECK-DAG: move $[[R1:[0-9]+]], $5
; CHECK-DAG: move $[[R0:[0-9]+]], $4
; CHECK-DAG: ori $6, ${{[0-9]+}}, 3855
; CHECK-DAG: ori $7, ${{[0-9]+}}, 22136
; CHECK-DAG: lw $25, %call16(ff1)
; CHECK: jalr
tail call void @ff1(i32 %i, i64 1085102592623924856) nounwind
; CHECK-DAG: lw $25, %call16(ff2)
; CHECK-DAG: lw $[[R2:[0-9]+]], 80($sp)
; CHECK-DAG: lw $[[R3:[0-9]+]], 84($sp)
; CHECK-DAG: move $4, $[[R2]]
; CHECK-DAG: move $5, $[[R3]]
; CHECK: jalr $25
Expand Down
13 changes: 13 additions & 0 deletions test/CodeGen/Mips/tailcall.ll
Original file line number Diff line number Diff line change
Expand Up @@ -243,3 +243,16 @@ entry:
ret i32 %call
}

; Check that there is a chain edge between the load and store nodes.
;
; PIC32-LABEL: caller14:
; PIC32: lw ${{[0-9]+}}, 16($sp)
; PIC32: sw $4, 16($sp)

define void @caller14(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e) {
entry:
tail call void @callee14(i32 %e, i32 %b, i32 %c, i32 %d, i32 %a)
ret void
}

declare void @callee14(i32, i32, i32, i32, i32)

0 comments on commit 9583022

Please sign in to comment.