Merge branch 'feature/esp32c5_xtal_support' into 'master'

feat(clk): support ESP32C5 XTAL 40M/48M selection

Closes IDF-8943

See merge request espressif/esp-idf!31409

components/bootloader_support/src/bootloader_console.c

@@ -25,9 +25,6 @@
 #include "esp_rom_uart.h"
 #include "esp_rom_sys.h"
 #include "esp_rom_caps.h"
-#if CONFIG_IDF_TARGET_ESP32C5
-#include "soc/pcr_reg.h"
-#endif
 
 #ifdef CONFIG_ESP_CONSOLE_NONE
 void bootloader_console_init(void)
@@ -88,13 +85,6 @@ void bootloader_console_init(void)
 #if ESP_ROM_UART_CLK_IS_XTAL
     clock_hz = (uint32_t)rtc_clk_xtal_freq_get() * MHZ; // From esp32-s3 on, UART clk source is selected to XTAL in ROM
 #endif
-#if CONFIG_IDF_TARGET_ESP32C5_MP_VERSION
-#if CONFIG_IDF_ENV_FPGA
-    clock_hz = CONFIG_XTAL_FREQ * MHZ;
-#else
-    clock_hz = REG_GET_FIELD(PCR_SYSCLK_CONF_REG, PCR_CLK_XTAL_FREQ) * MHZ;
-#endif  // CONFIG_IDF_ENV_FPGA
-#endif  // CONFIG_IDF_TARGET_ESP32C5_MP_VERSION
     esp_rom_uart_set_clock_baudrate(uart_num, clock_hz, CONFIG_ESP_CONSOLE_UART_BAUDRATE);
 }
 #endif // CONFIG_ESP_CONSOLE_UART

components/esp_hw_support/Kconfig

@@ -240,51 +240,7 @@ menu "Hardware Settings"
     rsource "./dma/Kconfig.dma"
 
     menu "Main XTAL Config"
-        # TODO: IDF-8943
-        choice XTAL_FREQ_SEL
-            prompt "Main XTAL frequency"
-            default XTAL_FREQ_48 if SOC_XTAL_SUPPORT_48M
-            default XTAL_FREQ_40 if (SOC_XTAL_SUPPORT_40M && !SOC_XTAL_SUPPORT_48M)
-            help
-                This option selects the operating frequency of the XTAL (crystal) clock used to drive the ESP target.
-                The selected value MUST reflect the frequency of the given hardware.
-
-                Note: The XTAL_FREQ_AUTO option allows the ESP target to automatically estimating XTAL clock's
-                operating frequency. However, this feature is only supported on the ESP32. The ESP32 uses the
-                internal 8MHZ as a reference when estimating. Due to the internal oscillator's frequency being
-                temperature dependent, usage of the XTAL_FREQ_AUTO is not recommended in applications that operate
-                in high ambient temperatures or use high-temperature qualified chips and modules.
-
-            config XTAL_FREQ_24
-                depends on SOC_XTAL_SUPPORT_24M
-                bool "24 MHz"
-            config XTAL_FREQ_26
-                depends on SOC_XTAL_SUPPORT_26M
-                bool "26 MHz"
-            config XTAL_FREQ_32
-                depends on SOC_XTAL_SUPPORT_32M
-                bool "32 MHz"
-            config XTAL_FREQ_40
-                depends on SOC_XTAL_SUPPORT_40M
-                bool "40 MHz"
-            config XTAL_FREQ_48
-                depends on SOC_XTAL_SUPPORT_48M
-                bool "48 MHz"
-            config XTAL_FREQ_AUTO
-                depends on SOC_XTAL_SUPPORT_AUTO_DETECT
-                bool "Autodetect"
-        endchoice
-
-        # soc_xtal_freq_t enum in soc/clk_tree_defs.h lists the XTAL frequencies can be supported
-        # SOC_XTAL_SUPPORT_XXX in soc_caps.h lists the XTAL frequencies already supported
-        config XTAL_FREQ
-            int
-            default 24 if XTAL_FREQ_24
-            default 26 if XTAL_FREQ_26
-            default 32 if XTAL_FREQ_32
-            default 40 if XTAL_FREQ_40
-            default 48 if XTAL_FREQ_48
-            default 0  if XTAL_FREQ_AUTO
+        orsource "./port/$IDF_TARGET/Kconfig.xtal"
     endmenu
 
     menu "Crypto DPA Protection"

components/esp_hw_support/port/esp32/Kconfig.xtal

@@ -0,0 +1,30 @@
+choice XTAL_FREQ
+    prompt "Main XTAL frequency"
+    default XTAL_FREQ_40
+    help
+        This option selects the operating frequency of the XTAL (crystal) clock used to drive the ESP target.
+        The selected value MUST reflect the frequency of the given hardware.
+
+        Note: On ESP32, the XTAL_FREQ_AUTO option allows the ESP target to automatically estimating XTAL clock's
+        operating frequency. The ESP32 uses the internal 8MHZ as a reference when estimating. Due to the internal
+        oscillator's frequency being temperature dependent, usage of the XTAL_FREQ_AUTO is not recommended in
+        applications that operate in high ambient temperatures or use high-temperature qualified chips and modules.
+
+    config XTAL_FREQ_26
+        bool "26 MHz"
+    config XTAL_FREQ_32
+        bool "32 MHz"
+    config XTAL_FREQ_40
+        bool "40 MHz"
+    config XTAL_FREQ_AUTO
+        bool "Autodetect"
+endchoice
+
+# soc_xtal_freq_t enum in soc/clk_tree_defs.h lists the XTAL frequencies can be supported
+# SOC_XTAL_SUPPORT_XXX in soc_caps.h lists the XTAL frequencies already supported
+config XTAL_FREQ
+    int
+    default 26 if XTAL_FREQ_26
+    default 32 if XTAL_FREQ_32
+    default 40 if XTAL_FREQ_40
+    default 0  if XTAL_FREQ_AUTO

components/esp_hw_support/port/esp32c2/Kconfig.xtal

@@ -0,0 +1,19 @@
+choice XTAL_FREQ
+    prompt "Main XTAL frequency"
+    default XTAL_FREQ_40
+    help
+        This option selects the operating frequency of the XTAL (crystal) clock used to drive the ESP target.
+        The selected value MUST reflect the frequency of the given hardware.
+
+    config XTAL_FREQ_26
+        bool "26 MHz"
+    config XTAL_FREQ_40
+        bool "40 MHz"
+endchoice
+
+# soc_xtal_freq_t enum in soc/clk_tree_defs.h lists the XTAL frequencies can be supported
+# SOC_XTAL_SUPPORT_XXX in soc_caps.h lists the XTAL frequencies already supported
+config XTAL_FREQ
+    int
+    default 26 if XTAL_FREQ_26
+    default 40 if XTAL_FREQ_40

components/esp_hw_support/port/esp32c3/Kconfig.xtal

@@ -0,0 +1,16 @@
+choice XTAL_FREQ
+    prompt "Main XTAL frequency"
+    default XTAL_FREQ_40
+    help
+        This option selects the operating frequency of the XTAL (crystal) clock used to drive the ESP target.
+        The selected value MUST reflect the frequency of the given hardware.
+
+    config XTAL_FREQ_40
+        bool "40 MHz"
+endchoice
+
+# soc_xtal_freq_t enum in soc/clk_tree_defs.h lists the XTAL frequencies can be supported
+# SOC_XTAL_SUPPORT_XXX in soc_caps.h lists the XTAL frequencies already supported
+config XTAL_FREQ
+    int
+    default 40 if XTAL_FREQ_40

components/esp_hw_support/port/esp32c5/Kconfig.xtal

@@ -0,0 +1,30 @@
+choice XTAL_FREQ
+    prompt "Main XTAL frequency"
+    default XTAL_FREQ_48 if IDF_TARGET_ESP32C5_BETA3_VERSION
+    default XTAL_FREQ_AUTO
+    help
+        This option selects the operating frequency of the XTAL (crystal) clock used to drive the ESP target.
+        The selected value MUST reflect the frequency of the given hardware.
+
+        Note: ESP32C5 supports crystal frequencies of 40 MHz and 48 MHz. With XTAL_FREQ_AUTO option, boot
+        mode together with MTMS pin, EFUSE_XTAL_48M_SEL, and EFUSE_XTAL_48M_SEL_MODE collectively control
+        the crystal frequency, and record to PCR_CLK_XTAL_FREQ register field.
+
+    config XTAL_FREQ_AUTO
+        depends on IDF_TARGET_ESP32C5_MP_VERSION
+        bool "Autodetect"
+    config XTAL_FREQ_40
+        depends on IDF_TARGET_ESP32C5_BETA3_VERSION
+        bool "40 MHz"
+    config XTAL_FREQ_48
+        depends on IDF_TARGET_ESP32C5_BETA3_VERSION
+        bool "48 MHz"
+endchoice
+
+# soc_xtal_freq_t enum in soc/clk_tree_defs.h lists the XTAL frequencies can be supported
+# SOC_XTAL_SUPPORT_XXX in soc_caps.h lists the XTAL frequencies already supported
+config XTAL_FREQ
+    int
+    default 0  if XTAL_FREQ_AUTO
+    default 40 if XTAL_FREQ_40
+    default 48 if XTAL_FREQ_48

components/esp_hw_support/port/esp32c5/esp_clk_tree.c

@@ -27,7 +27,7 @@ uint32_t *freq_value)
     uint32_t clk_src_freq = 0;
     switch (clk_src) {
     case SOC_MOD_CLK_XTAL:
-        clk_src_freq = CONFIG_XTAL_FREQ * MHZ;
+        clk_src_freq = clk_hal_xtal_get_freq_mhz() * MHZ;
         break;
     case SOC_MOD_CLK_PLL_F80M:
         clk_src_freq = CLK_LL_PLL_80M_FREQ_MHZ * MHZ;
@@ -51,7 +51,7 @@ uint32_t *freq_value)
         clk_src_freq = SOC_CLK_RC_FAST_FREQ_APPROX;
         break;
     case SOC_MOD_CLK_XTAL_D2:
-        clk_src_freq = (CONFIG_XTAL_FREQ * MHZ) >> 1;
+        clk_src_freq = (clk_hal_xtal_get_freq_mhz() * MHZ) >> 1;
         break;
     default:
         break;

components/esp_hw_support/port/esp32c5/include/soc/rtc.h

@@ -10,6 +10,7 @@
 #include <stdint.h>
 #include "soc/soc.h"
 #include "soc/clk_tree_defs.h"
+#include "sdkconfig.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -186,6 +187,7 @@ void rtc_clk_init(rtc_clk_config_t cfg);
  */
 soc_xtal_freq_t rtc_clk_xtal_freq_get(void);
 
+#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
 /**
  * @brief Update XTAL frequency
  *
@@ -195,6 +197,7 @@ soc_xtal_freq_t rtc_clk_xtal_freq_get(void);
  * @param xtal_freq New frequency value
  */
 void rtc_clk_xtal_freq_update(soc_xtal_freq_t xtal_freq);
+#endif
 
 /**
  * @brief Enable or disable 32 kHz XTAL oscillator
@@ -452,17 +455,6 @@ bool rtc_dig_8m_enabled(void);
  */
 uint32_t rtc_clk_freq_cal(uint32_t cal_val);
 
-
-// -------------------------- CLOCK TREE DEFS ALIAS ----------------------------
-// **WARNING**: The following are only for backwards compatibility.
-// Please use the declarations in soc/clk_tree_defs.h instead.
-/**
- * @brief Possible main XTAL frequency values. TODO: To be removed!
- */
-typedef soc_xtal_freq_t rtc_xtal_freq_t;
-#define RTC_XTAL_FREQ_40M SOC_XTAL_FREQ_40M                 //!< 40 MHz XTAL
-#define RTC_XTAL_FREQ_48M SOC_XTAL_FREQ_48M                 //!< 48 MHz XTAL
-
 #ifdef __cplusplus
 }
 #endif

components/esp_hw_support/port/esp32c5/rtc_clk.c

@@ -477,21 +477,25 @@ void rtc_clk_cpu_freq_to_pll_and_pll_lock_release(int cpu_freq_mhz)
 soc_xtal_freq_t rtc_clk_xtal_freq_get(void)
 {
 #if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
-    return CONFIG_XTAL_FREQ;
-#elif CONFIG_IDF_TARGET_ESP32C5_MP_VERSION
     uint32_t xtal_freq_mhz = clk_ll_xtal_load_freq_mhz();
     if (xtal_freq_mhz == 0) {
-        ESP_HW_LOGW(TAG, "invalid RTC_XTAL_FREQ_REG value, assume 40MHz");
-        return RTC_XTAL_FREQ_40M;
+        ESP_HW_LOGW(TAG, "invalid RTC_XTAL_FREQ_REG value, assume 48MHz");
+        return SOC_XTAL_FREQ_48M;
     }
     return (soc_xtal_freq_t)xtal_freq_mhz;
+#elif CONFIG_IDF_TARGET_ESP32C5_MP_VERSION
+    uint32_t xtal_freq_mhz = clk_ll_xtal_get_freq_mhz();
+    assert(xtal_freq_mhz == SOC_XTAL_FREQ_48M || xtal_freq_mhz == SOC_XTAL_FREQ_40M);
+    return (soc_xtal_freq_t)xtal_freq_mhz;
 #endif
 }
 
+#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
 void rtc_clk_xtal_freq_update(soc_xtal_freq_t xtal_freq)
 {
     clk_ll_xtal_store_freq_mhz(xtal_freq);
 }
+#endif
 
 static uint32_t rtc_clk_ahb_freq_get(void)
 {
@@ -561,10 +565,3 @@ bool rtc_dig_8m_enabled(void)
 {
     return clk_ll_rc_fast_digi_is_enabled();
 }
-
-#if CONFIG_IDF_TARGET_ESP32C5_MP_VERSION
-/* Name used in libphy.a:phy_chip_v7.o
- * TODO: update the library to use rtc_clk_xtal_freq_get
- */
-rtc_xtal_freq_t rtc_get_xtal(void) __attribute__((alias("rtc_clk_xtal_freq_get")));
-#endif

components/esp_hw_support/port/esp32c5/rtc_clk_init.c

@@ -84,9 +84,13 @@ void rtc_clk_init(rtc_clk_config_t cfg)
 
     clk_ll_rc_fast_tick_conf(); // TODO: IDF-8642 Unnecessary or not?
 
+#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
     soc_xtal_freq_t xtal_freq = cfg.xtal_freq;
     esp_rom_output_tx_wait_idle(0);
     rtc_clk_xtal_freq_update(xtal_freq);
+#else
+    // XTAL freq determined by efuse, and can be directly informed from register field PCR_CLK_XTAL_FREQ
+#endif
 
     /* Set CPU frequency */
     rtc_clk_cpu_freq_get_config(&old_config);

components/esp_hw_support/port/esp32c5/systimer.c

@@ -6,7 +6,9 @@
 
 #include "sdkconfig.h"
 #include "esp_private/systimer.h"
+#include "hal/clk_tree_ll.h"
 
+#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
 #if CONFIG_XTAL_FREQ_40
 /**
  * @brief systimer's clock source is fixed to XTAL (40MHz), and has a fixed fractional divider (2.5).
@@ -35,3 +37,20 @@ uint64_t systimer_us_to_ticks(uint64_t us)
 #else
 #error "Unsupported XTAL frequency by systimer"
 #endif // CONFIG_XTAL_FREQ_xx
+
+#else // !CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
+/**
+ * @brief systimer's clock source is fixed to XTAL, the fixed fractional divider is changed according to
+ * EFUSE_XTAL_48M_SEL. No matter 48MHz or 40MHz XTAL, the resolution of the systimer is always 16MHz.
+ */
+
+uint64_t systimer_ticks_to_us(uint64_t ticks)
+{
+    return ticks / 16;
+}
+
+uint64_t systimer_us_to_ticks(uint64_t us)
+{
+    return us * 16;
+}
+#endif

components/esp_hw_support/port/esp32c6/Kconfig.xtal

@@ -0,0 +1,16 @@
+choice XTAL_FREQ
+    prompt "Main XTAL frequency"
+    default XTAL_FREQ_40
+    help
+        This option selects the operating frequency of the XTAL (crystal) clock used to drive the ESP target.
+        The selected value MUST reflect the frequency of the given hardware.
+
+    config XTAL_FREQ_40
+        bool "40 MHz"
+endchoice
+
+# soc_xtal_freq_t enum in soc/clk_tree_defs.h lists the XTAL frequencies can be supported
+# SOC_XTAL_SUPPORT_XXX in soc_caps.h lists the XTAL frequencies already supported
+config XTAL_FREQ
+    int
+    default 40 if XTAL_FREQ_40

components/esp_hw_support/port/esp32c61/Kconfig.xtal

@@ -0,0 +1,16 @@
+choice XTAL_FREQ
+    prompt "Main XTAL frequency"
+    default XTAL_FREQ_40
+    help
+        This option selects the operating frequency of the XTAL (crystal) clock used to drive the ESP target.
+        The selected value MUST reflect the frequency of the given hardware.
+
+    config XTAL_FREQ_40
+        bool "40 MHz"
+endchoice
+
+# soc_xtal_freq_t enum in soc/clk_tree_defs.h lists the XTAL frequencies can be supported
+# SOC_XTAL_SUPPORT_XXX in soc_caps.h lists the XTAL frequencies already supported
+config XTAL_FREQ
+    int
+    default 40 if XTAL_FREQ_40

components/esp_hw_support/port/esp32h2/Kconfig.xtal

@@ -0,0 +1,16 @@
+choice XTAL_FREQ
+    prompt "Main XTAL frequency"
+    default XTAL_FREQ_32
+    help
+        This option selects the operating frequency of the XTAL (crystal) clock used to drive the ESP target.
+        The selected value MUST reflect the frequency of the given hardware.
+
+    config XTAL_FREQ_32
+        bool "32 MHz"
+endchoice
+
+# soc_xtal_freq_t enum in soc/clk_tree_defs.h lists the XTAL frequencies can be supported
+# SOC_XTAL_SUPPORT_XXX in soc_caps.h lists the XTAL frequencies already supported
+config XTAL_FREQ
+    int
+    default 32 if XTAL_FREQ_32

components/esp_hw_support/port/esp32p4/Kconfig.xtal

@@ -0,0 +1,16 @@
+choice XTAL_FREQ
+    prompt "Main XTAL frequency"
+    default XTAL_FREQ_40
+    help
+        This option selects the operating frequency of the XTAL (crystal) clock used to drive the ESP target.
+        The selected value MUST reflect the frequency of the given hardware.
+
+    config XTAL_FREQ_40
+        bool "40 MHz"
+endchoice
+
+# soc_xtal_freq_t enum in soc/clk_tree_defs.h lists the XTAL frequencies can be supported
+# SOC_XTAL_SUPPORT_XXX in soc_caps.h lists the XTAL frequencies already supported
+config XTAL_FREQ
+    int
+    default 40 if XTAL_FREQ_40