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feat(pm): support pd top for esp32c5beta3
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@10086loutianhao
10086loutianhao committed Apr 12, 2024
1 parent ec37cbf commit 534e7a5
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Showing 11 changed files with 816 additions and 38 deletions.
14 changes: 7 additions & 7 deletions components/esp_hw_support/CMakeLists.txt
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Expand Up @@ -152,17 +152,17 @@ if(NOT BOOTLOADER_BUILD)

if(CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION)
list(REMOVE_ITEM srcs
"sleep_gpio.c" # TODO: [ESP32C5] IDF-8638, IDF-8640
"port/esp_clk_tree_common.c" # TODO: [ESP32C5] IDF-8638, IDF-8640
"sleep_gpio.c" # TODO: [ESP32C5] IDF-8638
"port/esp_clk_tree_common.c" # TODO: [ESP32C5] IDF-8638
)
endif()
if(CONFIG_IDF_TARGET_ESP32C5_MP_VERSION)
list(REMOVE_ITEM srcs
"sleep_modes.c" # TODO: [ESP32C5] IDF-8638, IDF-8640
"sleep_modem.c" # TODO: [ESP32C5] IDF-8638, IDF-8640
"sleep_wake_stub.c" # TODO: [ESP32C5] IDF-8638, IDF-8640
"sleep_gpio.c" # TODO: [ESP32C5] IDF-8638, IDF-8640
"port/esp_clk_tree_common.c" # TODO: [ESP32C5] IDF-8638, IDF-8640
"sleep_modes.c" # TODO: [ESP32C5] IDF-8638
"sleep_modem.c" # TODO: [ESP32C5] IDF-8638
"sleep_wake_stub.c" # TODO: [ESP32C5] IDF-8638
"sleep_gpio.c" # TODO: [ESP32C5] IDF-8638
"port/esp_clk_tree_common.c" # TODO: [ESP32C5] IDF-8638
)
endif()
if(CONFIG_IDF_TARGET_ESP32C61) # TODO: [ESP32C61] IDF-9245, IDF-9247, IDF-9248
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2 changes: 1 addition & 1 deletion components/esp_hw_support/sleep_modes.c
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Expand Up @@ -146,7 +146,7 @@
#elif CONFIG_IDF_TARGET_ESP32C6
#define DEFAULT_SLEEP_OUT_OVERHEAD_US (318)
#define DEFAULT_HARDWARE_OUT_OVERHEAD_US (56)
#elif CONFIG_IDF_TARGET_ESP32C5 // TODO: [ESP32C5] IDF-8638, IDF-8640
#elif CONFIG_IDF_TARGET_ESP32C5 // TODO: [ESP32C5] IDF-8638
#define DEFAULT_SLEEP_OUT_OVERHEAD_US (318)
#define DEFAULT_HARDWARE_OUT_OVERHEAD_US (56)
#elif CONFIG_IDF_TARGET_ESP32H2
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12 changes: 12 additions & 0 deletions components/hal/esp32c5/include/hal/pau_ll.h
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Expand Up @@ -13,13 +13,25 @@
#include "soc/soc.h"
#include "soc/pau_reg.h"
#include "soc/pau_struct.h"
#include "soc/pcr_struct.h"
#include "hal/pau_types.h"
#include "hal/assert.h"

#ifdef __cplusplus
extern "C" {
#endif

static inline void pau_ll_enable_bus_clock(bool enable)
{
if (enable) {
PCR.regdma_conf.regdma_clk_en = 1;
PCR.regdma_conf.regdma_rst_en = 0;
} else {
PCR.regdma_conf.regdma_clk_en = 0;
PCR.regdma_conf.regdma_rst_en = 1;
}
}

static inline uint32_t pau_ll_get_regdma_backup_flow_error(pau_dev_t *dev)
{
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
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71 changes: 71 additions & 0 deletions components/soc/esp32c5/beta3/gpio_periph.c
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@@ -0,0 +1,71 @@
/*
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

#include "soc/gpio_periph.h"

const uint32_t GPIO_PIN_MUX_REG[] = {
IO_MUX_GPIO0_REG,
IO_MUX_GPIO1_REG,
IO_MUX_GPIO2_REG,
IO_MUX_GPIO3_REG,
IO_MUX_GPIO4_REG,
IO_MUX_GPIO5_REG,
IO_MUX_GPIO6_REG,
IO_MUX_GPIO7_REG,
IO_MUX_GPIO8_REG,
IO_MUX_GPIO9_REG,
IO_MUX_GPIO10_REG,
IO_MUX_GPIO11_REG,
IO_MUX_GPIO12_REG,
IO_MUX_GPIO13_REG,
IO_MUX_GPIO14_REG,
IO_MUX_GPIO15_REG,
IO_MUX_GPIO16_REG,
IO_MUX_GPIO17_REG,
IO_MUX_GPIO18_REG,
IO_MUX_GPIO19_REG,
IO_MUX_GPIO20_REG,
IO_MUX_GPIO21_REG,
IO_MUX_GPIO22_REG,
IO_MUX_GPIO23_REG,
IO_MUX_GPIO24_REG,
IO_MUX_GPIO25_REG,
IO_MUX_GPIO26_REG,
};

_Static_assert(sizeof(GPIO_PIN_MUX_REG) == SOC_GPIO_PIN_COUNT * sizeof(uint32_t), "Invalid size of GPIO_PIN_MUX_REG");

const uint32_t GPIO_HOLD_MASK[] = {
BIT(0), //GPIO0 // LP_AON_GPIO_HOLD0_REG
BIT(1), //GPIO1
BIT(2), //GPIO2
BIT(3), //GPIO3
BIT(4), //GPIO4
BIT(5), //GPIO5
BIT(6), //GPIO6
BIT(7), //GPIO7
BIT(8), //GPIO8
BIT(9), //GPIO9
BIT(10), //GPIO10
BIT(11), //GPIO11
BIT(12), //GPIO12
BIT(13), //GPIO13
BIT(14), //GPIO14
BIT(15), //GPIO15
BIT(16), //GPIO16
BIT(17), //GPIO17
BIT(18), //GPIO18
BIT(19), //GPIO19
BIT(20), //GPIO20
BIT(21), //GPIO21
BIT(22), //GPIO22
BIT(23), //GPIO23
BIT(24), //GPIO24
BIT(25), //GPIO25
BIT(26), //GPIO26
};

_Static_assert(sizeof(GPIO_HOLD_MASK) == SOC_GPIO_PIN_COUNT * sizeof(uint32_t), "Invalid size of GPIO_HOLD_MASK");
16 changes: 16 additions & 0 deletions components/soc/esp32c5/beta3/include/soc/Kconfig.soc_caps.in
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Expand Up @@ -103,6 +103,10 @@ config SOC_PMU_SUPPORTED
bool
default y

config SOC_PAU_SUPPORTED
bool
default y

config SOC_LP_TIMER_SUPPORTED
bool
default y
Expand All @@ -127,6 +131,10 @@ config SOC_SPI_FLASH_SUPPORTED
bool
default y

config SOC_LIGHT_SLEEP_SUPPORTED
bool
default y

config SOC_MODEM_CLOCK_SUPPORTED
bool
default y
Expand Down Expand Up @@ -655,6 +663,10 @@ config SOC_PM_SUPPORT_VDDSDIO_PD
bool
default y

config SOC_PM_SUPPORT_TOP_PD
bool
default y

config SOC_PM_SUPPORT_HP_AON_PD
bool
default y
Expand All @@ -675,6 +687,10 @@ config SOC_PM_CPU_RETENTION_BY_SW
bool
default y

config SOC_PM_MODEM_RETENTION_BY_REGDMA
bool
default y

config SOC_PM_PAU_LINK_NUM
int
default 4
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