Remove redundant ifndef SYNTHESIS

This is already covered by `pragma translate_off`.
YL29399 · Dec 19, 2019 · 44f15e7 · 44f15e7
1 parent 08a6e40
commit 44f15e7
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Showing 3 changed files with 0 additions and 12 deletions.
diff --git a/src/axi_cut.sv b/src/axi_cut.sv
@@ -176,7 +176,6 @@ module axi_cut_intf #(
   // Check the invariants.
   // pragma translate_off
   `ifndef VERILATOR
-  `ifndef SYNTHESIS
   initial begin
     assert ( ADDR_WIDTH > 0 ) else $fatal(1, "Wrong addr width parameter");
     assert ( DATA_WIDTH > 0 ) else $fatal(1, "Wrong data width parameter");
@@ -192,7 +191,6 @@ module axi_cut_intf #(
     assert ( out.AXI_USER_WIDTH == USER_WIDTH) else $fatal(1, "Wrong interface definition");
   end
   `endif
-  `endif
   // pragma translate_on
 endmodule
 
@@ -246,7 +244,6 @@ module axi_lite_cut_intf #(
   // Check the invariants.
   // pragma translate_off
   `ifndef VERILATOR
-  `ifndef SYNTHESIS
   initial begin
     assert ( ADDR_WIDTH > 0) else $fatal(1, "Wrong addr width parameter");
     assert ( DATA_WIDTH > 0) else $fatal(1, "Wrong data width parameter");
@@ -256,6 +253,5 @@ module axi_lite_cut_intf #(
     assert ( out.AXI_DATA_WIDTH == DATA_WIDTH ) else $fatal(1, "Wrong interface definition");
   end
   `endif
-  `endif
   // pragma translate_on
 endmodule
diff --git a/src/axi_lite_to_axi.sv b/src/axi_lite_to_axi.sv
@@ -86,12 +86,10 @@ module axi_lite_to_axi_intf (
 );
 
 // pragma translate_off
-`ifndef SYNTHESIS
   initial begin
     assert(in.AXI_ADDR_WIDTH == out.AXI_ADDR_WIDTH);
     assert(in.AXI_DATA_WIDTH == out.AXI_DATA_WIDTH);
   end
-`endif
 // pragma translate_on
 
   assign out.aw_id     = '0;

diff --git a/src/axi_multicut.sv b/src/axi_multicut.sv
@@ -79,12 +79,10 @@ module axi_multicut #(
   // Check the invariants
   // pragma translate_off
   `ifndef VERILATOR
-  `ifndef SYNTHESIS
   initial begin
     assert(NoCuts >= 0);
   end
   `endif
-  `endif
   // pragma translate_on
 endmodule
 
@@ -149,7 +147,6 @@ module axi_multicut_intf #(
   // Check the invariants.
   // pragma translate_off
   `ifndef VERILATOR
-  `ifndef SYNTHESIS
   initial begin
     assert ( ADDR_WIDTH > 0 ) else $fatal(1, "Wrong addr width parameter");
     assert ( DATA_WIDTH > 0 ) else $fatal(1, "Wrong data width parameter");
@@ -165,7 +162,6 @@ module axi_multicut_intf #(
     assert ( out.AXI_USER_WIDTH == USER_WIDTH ) else $fatal(1, "Wrong interface definition");
   end
   `endif
-  `endif
   // pragma translate_on
 endmodule
 
@@ -225,7 +221,6 @@ module axi_lite_multicut_intf #(
   // Check the invariants.
   // pragma translate_off
   `ifndef VERILATOR
-  `ifndef SYNTHESIS
   initial begin
     assert ( ADDR_WIDTH > 0 ) else $fatal(1, "Wrong addr width parameter");
     assert ( DATA_WIDTH > 0 ) else $fatal(1, "Wrong data width parameter");
@@ -235,6 +230,5 @@ module axi_lite_multicut_intf #(
     assert ( out.AXI_DATA_WIDTH == DATA_WIDTH ) else $fatal(1, "Wrong interface definition");
   end
   `endif
-  `endif
   // pragma translate_on
 endmodule