Merge branch 'master' of https://github.com/YosysHQ/prjtrellis into f…

…acade
YosysHQ · Sep 7, 2020 · db94108 · db94108
2 parents 52c31c1 + 389c251
commit db94108
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Showing 2 changed files with 9 additions and 6 deletions.
diff --git a/database b/database
diff --git a/fuzzers/ECP5/132-dlldel/fuzzer.py b/fuzzers/ECP5/132-dlldel/fuzzer.py
@@ -6,15 +6,18 @@
 
 jobs = [(FuzzConfig(job="TDLLDEL", family="ECP5", device="LFE5U-45F", ncl="empty.ncl",
                     tiles=["MIB_R0C40:TMID_0", "MIB_R0C41:TMID_1"]),
-         [("DLLDEL_00", "R0C39"), ("DLLDEL_01", "R0C40"), ("DLLDEL_10", "R0C41"), ("DLLDEL_11", "R0C42")]
+         [("DLLDEL_00", "R0C39"), ("DLLDEL_01", "R0C40"), ("DLLDEL_10", "R0C41"), ("DLLDEL_11", "R0C42")],
+         ["R0C39_JPADDI", "R0C40_JPADDI", "R0C41_JPADDI", "R0C41_JPADDI"]
          ),
         (FuzzConfig(job="LDLLDEL", family="ECP5", device="LFE5U-45F", ncl="empty.ncl",
                     tiles=["CIB_R34C2:ECLK_L", "MIB_R34C3:LMID_0"]),
-         [("DLLDEL_61", "R36C0"), ("DLLDEL_60", "R35C0"), ("DLLDEL_71", "R34C0"), ("DLLDEL_70", "R33C0")]
+         [("DLLDEL_61", "R36C0"), ("DLLDEL_60", "R35C0"), ("DLLDEL_71", "R34C0"), ("DLLDEL_70", "R33C0")],
+         ["R36C0_JPADDI", "R35C0_JPADDI", "R34C0_JPADDI", "R33C0_JPADDI"]
          ),
         (FuzzConfig(job="RDLLDEL", family="ECP5", device="LFE5U-45F", ncl="empty.ncl",
                     tiles=["CIB_R34C88:ECLK_R", "MIB_R34C87:RMID_0"]),
-         [("DLLDEL_31", "R36C90"), ("DLLDEL_30", "R35C90"), ("DLLDEL_21", "R34C90"), ("DLLDEL_20", "R33C90")]
+         [("DLLDEL_31", "R36C90"), ("DLLDEL_30", "R35C90"), ("DLLDEL_21", "R34C90"), ("DLLDEL_20", "R33C90")],
+         ["R36C90_JPADDI", "R35C90_JPADDI", "R34C90_JPADDI", "R33C90_JPADDI"]
          ),
         ]
 
@@ -31,7 +34,7 @@ def main():
     pytrellis.load_database("../../../database")
 
     def per_job(job):
-        cfg, locs = job
+        cfg, locs, paddi = job
         cfg.setup()
 
         empty_bitfile = cfg.build_design(cfg.ncl, {})
@@ -81,7 +84,7 @@ def get_substs(mode="DLLDELD", program={}, ddrdel="DDRDEL", loadn="NO"):
                 "{}_JDIRECTION_DLLDEL".format(rc),
                 "{}_Z_DLLDEL".format(rc),
                 "{}_JINCK".format(rc),
-            ]
+            ] + paddi
 
             cfg.ncl = "dlldel_routing.ncl"
             interconnect.fuzz_interconnect_with_netnames(cfg, nets, bidir=True)
+24 −0		ECP5/tiledata/ECLK_L/bits.db
+24 −0		ECP5/tiledata/ECLK_R/bits.db
+16 −0		ECP5/tiledata/TMID_0/bits.db
+18 −0		ECP5/tiledata/TMID_1/bits.db