ZTHKaiYuan
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XiangShan
XiangShan PublicForked from OpenXiangShan/XiangShan
Open-source high-performance RISC-V processor
Scala
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cva6
cva6 PublicForked from openhwgroup/cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
SystemVerilog
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Repositories
- verilator Public Forked from verilator/verilator
Verilator open-source SystemVerilog simulator and lint system
ZTHKaiYuan/verilator’s past year of commit activity - ara Public Forked from pulp-platform/ara
The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core
ZTHKaiYuan/ara’s past year of commit activity - ravenoc Public Forked from aignacio/ravenoc
RaveNoC is a configurable HDL NoC (Network-On-Chip) suitable for MPSoCs and different MP applications
ZTHKaiYuan/ravenoc’s past year of commit activity
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